From patchwork Tue Mar 15 23:09:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 63897 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp975645lbc; Tue, 15 Mar 2016 16:10:10 -0700 (PDT) X-Received: by 10.28.178.208 with SMTP id b199mr896942wmf.51.1458083410934; Tue, 15 Mar 2016 16:10:10 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id yy1si507871wjc.161.2016.03.15.16.10.10; Tue, 15 Mar 2016 16:10:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9BBB6A75BC; Wed, 16 Mar 2016 00:09:44 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aSE3sTvs2Mnw; Wed, 16 Mar 2016 00:09:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BD891A7636; Wed, 16 Mar 2016 00:09:38 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AA96BA75F2 for ; Wed, 16 Mar 2016 00:09:26 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Q4pNEB2OA_46 for ; Wed, 16 Mar 2016 00:09:26 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by theia.denx.de (Postfix) with ESMTPS id 2AC15A75BC for ; Wed, 16 Mar 2016 00:09:21 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u2FN9IDG015779; Tue, 15 Mar 2016 18:09:18 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u2FN9I2R028176; Tue, 15 Mar 2016 18:09:18 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Tue, 15 Mar 2016 18:09:18 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u2FN9Itq028352; Tue, 15 Mar 2016 18:09:18 -0500 From: Nishanth Menon To: Tom Rini Date: Tue, 15 Mar 2016 18:09:16 -0500 Message-ID: <1458083357-31509-7-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1458083357-31509-1-git-send-email-nm@ti.com> References: <1458083357-31509-1-git-send-email-nm@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, Vishal Mahaveer Subject: [U-Boot] [PATCH 6/7] ARM: OMAP5/DRA7: Expose do_set_iodelay X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" do_set_iodelay can now be used from board files based on needs of the platforms variation they have. Signed-off-by: Nishanth Menon --- arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c | 4 ++-- arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) -- 1.7.9.5 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c b/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c index 744950f01bd9..87987308aced 100644 --- a/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c +++ b/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c @@ -138,8 +138,8 @@ static u32 get_cfg_reg(u16 a_delay, u16 g_delay, u32 cpde, u32 fpde) return reg; } -static int do_set_iodelay(u32 base, struct iodelay_cfg_entry const *array, - int niodelays) +int do_set_iodelay(u32 base, struct iodelay_cfg_entry const *array, + int niodelays) { struct iodelay_cfg_entry *iodelay = (struct iodelay_cfg_entry *)array; u32 reg, cpde, fpde, i; diff --git a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h index 0de8a800c1a2..c99700403914 100644 --- a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h +++ b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h @@ -86,4 +86,6 @@ void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads, int __recalibrate_iodelay_start(void); void __recalibrate_iodelay_end(int ret); +int do_set_iodelay(u32 base, struct iodelay_cfg_entry const *array, + int niodelays); #endif