From patchwork Tue Mar 15 23:09:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 63899 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp975982lbc; Tue, 15 Mar 2016 16:10:57 -0700 (PDT) X-Received: by 10.194.121.136 with SMTP id lk8mr525870wjb.92.1458083457588; Tue, 15 Mar 2016 16:10:57 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id gf10si516383wjb.142.2016.03.15.16.10.57; Tue, 15 Mar 2016 16:10:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C4F54A7636; Wed, 16 Mar 2016 00:10:04 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SwYDCZUzN6d6; Wed, 16 Mar 2016 00:10:04 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 524CFA76E1; Wed, 16 Mar 2016 00:09:58 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 526B5A745C for ; Wed, 16 Mar 2016 00:09:27 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NwXjuu8YYfjR for ; Wed, 16 Mar 2016 00:09:27 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by theia.denx.de (Postfix) with ESMTPS id 55A90A75D6 for ; Wed, 16 Mar 2016 00:09:21 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id u2FN9JdY001899; Tue, 15 Mar 2016 18:09:19 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u2FN9JuK028183; Tue, 15 Mar 2016 18:09:19 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Tue, 15 Mar 2016 18:09:18 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u2FN9I8k011504; Tue, 15 Mar 2016 18:09:18 -0500 From: Nishanth Menon To: Tom Rini Date: Tue, 15 Mar 2016 18:09:15 -0500 Message-ID: <1458083357-31509-6-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1458083357-31509-1-git-send-email-nm@ti.com> References: <1458083357-31509-1-git-send-email-nm@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, Vishal Mahaveer Subject: [U-Boot] [PATCH 5/7] ARM: OMAP5/DRA7: Split iodelay functionality into sub steps X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Since many platforms may need different pad configuration required depending on variation of the platform with minor deltas, it is easier to maintain a sub step based approach to allow for pin mux and iodelay configuration which may depend on the platform variations and need to be done in IO isolation. While we retain the older __recalibrate_iodelay function which provides a ready sequencing, __recalibrate_iodelay_start and __recalibrate_iodelay_end may be alternatively used now and the callers will be responsible for the correct sequencing of operations. Signed-off-by: Nishanth Menon --- arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c | 64 +++++++++++++++++----- arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h | 2 + 2 files changed, 52 insertions(+), 14 deletions(-) -- 1.7.9.5 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c b/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c index 9fa6e6991f0e..744950f01bd9 100644 --- a/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c +++ b/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c @@ -166,16 +166,14 @@ static int do_set_iodelay(u32 base, struct iodelay_cfg_entry const *array, return 0; } -void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads, - struct iodelay_cfg_entry const *iodelay, - int niodelays) +int __recalibrate_iodelay_start(void) { int ret = 0; /* IO recalibration should be done only from SRAM */ if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context()) { puts("IODELAY recalibration called from invalid context - use only from SPL in SRAM\n"); - return; + return -1; } /* unlock IODELAY CONFIG registers */ @@ -191,23 +189,27 @@ void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads, goto err; ret = update_delay_mechanism((*ctrl)->iodelay_config_base); - if (ret) - goto err; - /* Configure Mux settings */ - do_set_mux32((*ctrl)->control_padconf_core_base, pad, npads); +err: + return ret; +} - /* Configure Manual IO timing modes */ - ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays); - if (ret) - goto err; +void __recalibrate_iodelay_end(int ret) +{ - ret = isolate_io(DEISOLATE_IO); + /* IO recalibration should be done only from SRAM */ + if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context()) { + puts("IODELAY recalibration called from invalid context - use only from SPL in SRAM\n"); + return; + } + + if (!ret) + ret = isolate_io(DEISOLATE_IO); -err: /* lock IODELAY CONFIG registers */ writel(CFG_IODELAY_LOCK_KEY, (*ctrl)->iodelay_config_base + CFG_REG_8_OFFSET); + /* * UART cannot be used during IO recalibration sequence as IOs are in * isolation. So error handling and debug prints are done after @@ -232,7 +234,41 @@ err: case ERR_FPDE: puts("IODELAY: FPDE calculation failed\n"); break; + case -1: + puts("IODELAY: Wrong Context call?\n"); + break; default: debug("IODELAY: IO delay recalibration successfully completed\n"); } + + return; +} + +void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads, + struct iodelay_cfg_entry const *iodelay, + int niodelays) +{ + int ret = 0; + + /* IO recalibration should be done only from SRAM */ + if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context()) { + puts("IODELAY recalibration called from invalid context - use only from SPL in SRAM\n"); + return; + } + + ret = __recalibrate_iodelay_start(); + if (ret) + goto err; + + /* Configure Mux settings */ + do_set_mux32((*ctrl)->control_padconf_core_base, pad, npads); + + /* Configure Manual IO timing modes */ + ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays); + if (ret) + goto err; + +err: + __recalibrate_iodelay_end(ret); + } diff --git a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h index 4cd0a3cc80d0..0de8a800c1a2 100644 --- a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h +++ b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h @@ -83,5 +83,7 @@ void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads, struct iodelay_cfg_entry const *iodelay, int niodelays); +int __recalibrate_iodelay_start(void); +void __recalibrate_iodelay_end(int ret); #endif