From patchwork Tue Mar 15 15:25:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 63888 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp734474lbc; Tue, 15 Mar 2016 08:27:06 -0700 (PDT) X-Received: by 10.194.200.194 with SMTP id ju2mr29961818wjc.63.1458055626341; Tue, 15 Mar 2016 08:27:06 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id h203si25157303wmf.37.2016.03.15.08.27.06; Tue, 15 Mar 2016 08:27:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B4A9DA7706; Tue, 15 Mar 2016 16:27:02 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6-rkj6J9lAUq; Tue, 15 Mar 2016 16:27:02 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9A343A76E6; Tue, 15 Mar 2016 16:26:57 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA626A745C for ; Tue, 15 Mar 2016 16:26:50 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I_RvFAMmb8AZ for ; Tue, 15 Mar 2016 16:26:50 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by theia.denx.de (Postfix) with ESMTPS id 4AAC9A76A3 for ; Tue, 15 Mar 2016 16:26:46 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u2FFQiHt029066; Tue, 15 Mar 2016 10:26:44 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u2FFQiDY025726; Tue, 15 Mar 2016 10:26:44 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Tue, 15 Mar 2016 10:26:43 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u2FFQh0t005163; Tue, 15 Mar 2016 10:26:44 -0500 From: Nishanth Menon To: Tom Rini Date: Tue, 15 Mar 2016 10:25:51 -0500 Message-ID: <1458055553-10818-2-git-send-email-nm@ti.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1458055553-10818-1-git-send-email-nm@ti.com> References: <1458055553-10818-1-git-send-email-nm@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/3] ARM: keystone2: Convert BOOTBITMASK to static inline function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" BOOTBITMASK is almost impossible to decode, so convert it into a simpler static line functions of equivalent solution. Reported-by: Tom Rini Signed-off-by: Nishanth Menon --- arch/arm/mach-keystone/include/mach/psc_defs.h | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) -- 2.7.0 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-keystone/include/mach/psc_defs.h b/arch/arm/mach-keystone/include/mach/psc_defs.h index 6e6e7fd433a1..9681175938d4 100644 --- a/arch/arm/mach-keystone/include/mach/psc_defs.h +++ b/arch/arm/mach-keystone/include/mach/psc_defs.h @@ -27,12 +27,16 @@ #define PSC_REG_MDSTAT(x) (0x800 + (4 * (x))) #define PSC_REG_MDCTL(x) (0xa00 + (4 * (x))) -#define BOOTBITMASK(x, y) ((((((u32)1 << (((u32)x) - ((u32)y) + (u32)1)) - \ - (u32)1)) << ((u32)y))) -#define BOOT_READ_BITFIELD(z, x, y) ((((u32)z) & BOOTBITMASK(x, y)) >> (y)) -#define BOOT_SET_BITFIELD(z, f, x, y) ((((u32)z) & ~BOOTBITMASK(x, y)) | \ - ((((u32)f) << (y)) & BOOTBITMASK(x, y))) +static inline u32 _boot_bit_mask(u32 x, u32 y) +{ + u32 val = (1 << (x - y + 1)) - 1; + return val << y; +} + +#define BOOT_READ_BITFIELD(z, x, y) ((((u32)z) & _boot_bit_mask(x, y)) >> (y)) +#define BOOT_SET_BITFIELD(z, f, x, y) ((((u32)z) & ~_boot_bit_mask(x, y)) | \ + ((((u32)f) << (y)) & _boot_bit_mask(x, y))) /* PDCTL */ #define PSC_REG_PDCTL_SET_NEXT(x, y) BOOT_SET_BITFIELD((x), (y), 0, 0)