From patchwork Fri Feb 26 05:21:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 62930 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp528659lbc; Thu, 25 Feb 2016 21:22:58 -0800 (PST) X-Received: by 10.195.12.42 with SMTP id en10mr48011295wjd.13.1456464178291; Thu, 25 Feb 2016 21:22:58 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id g126si2076907wma.21.2016.02.25.21.22.58; Thu, 25 Feb 2016 21:22:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7C27DA784D; Fri, 26 Feb 2016 06:22:23 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8e5sy3kwC3WK; Fri, 26 Feb 2016 06:22:23 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 56C2BA77C3; Fri, 26 Feb 2016 06:22:01 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BBEB7A74E0 for ; Fri, 26 Feb 2016 06:21:28 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Xg5GwOgtpNoJ for ; Fri, 26 Feb 2016 06:21:28 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg009-v.nifty.com (conuserg009.nifty.com [202.248.44.35]) by theia.denx.de (Postfix) with ESMTPS id 2A0B8A767F for ; Fri, 26 Feb 2016 06:21:24 +0100 (CET) Received: from beagle.diag.org (p14090-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.90]) (authenticated) by conuserg009-v.nifty.com with ESMTP id u1Q5L8lD000668; Fri, 26 Feb 2016 14:21:19 +0900 X-Nifty-SrcIP: [153.142.97.90] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 26 Feb 2016 14:21:50 +0900 Message-Id: <1456464113-13901-19-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456464113-13901-1-git-send-email-yamada.masahiro@socionext.com> References: <1456464113-13901-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 18/21] ARM: uniphier: rework DRAM size handling in UMC init code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Currently, DRAM size is converted twice: size in byte -> size in Gbit -> enum Optimize the code by converting the "size in byte" into enum directly. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram/umc-ph1-ld4.c | 14 +++++++------- arch/arm/mach-uniphier/dram/umc-ph1-sld8.c | 16 ++++++++-------- 2 files changed, 15 insertions(+), 15 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c b/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c index 92b0f18..0eb47d7 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c +++ b/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c @@ -76,7 +76,7 @@ static void umc_start_ssif(void __iomem *ssif_base) } static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, - int size, int freq, bool ddr3plus) + int freq, unsigned long size, bool ddr3plus) { enum dram_freq freq_e; enum dram_size size_e; @@ -101,14 +101,14 @@ static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, switch (size) { case 0: return 0; - case 1: + case SZ_128M: size_e = DRAM_SZ_128M; break; - case 2: + case SZ_256M: size_e = DRAM_SZ_256M; break; default: - pr_err("unsupported DRAM size\n"); + pr_err("unsupported DRAM size 0x%08lx\n", size); return -EINVAL; } @@ -140,7 +140,7 @@ static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, } static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base, - int freq, int size, bool ddr3plus, int ch) + int freq, unsigned long size, bool ddr3plus, int ch) { void __iomem *phy_base = dc_base + 0x00001000; int ret; @@ -159,7 +159,7 @@ static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base, if (ret) return ret; - return umc_dramcont_init(dc_base, ca_base, size, freq, ddr3plus); + return umc_dramcont_init(dc_base, ca_base, freq, size, ddr3plus); } int ph1_ld4_umc_init(const struct uniphier_board_data *bd) @@ -172,7 +172,7 @@ int ph1_ld4_umc_init(const struct uniphier_board_data *bd) for (ch = 0; ch < DRAM_CH_NR; ch++) { ret = umc_ch_init(dc_base, ca_base, bd->dram_freq, - bd->dram_ch[ch].size / SZ_128M, + bd->dram_ch[ch].size, bd->dram_ddr3plus, ch); if (ret) { pr_err("failed to initialize UMC ch%d\n", ch); diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c b/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c index a2ed9ba..43e53fd 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c +++ b/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c @@ -79,7 +79,7 @@ static void umc_start_ssif(void __iomem *ssif_base) } static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, - int size, int freq, bool ddr3plus) + int freq, unsigned long size, bool ddr3plus) { enum dram_freq freq_e; enum dram_size size_e; @@ -99,17 +99,17 @@ static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, switch (size) { case 0: return 0; - case 1: + case SZ_128M: size_e = DRAM_SZ_128M; break; - case 2: + case SZ_256M: size_e = DRAM_SZ_256M; break; - case 4: + case SZ_512M: size_e = DRAM_SZ_512M; break; default: - pr_err("unsupported DRAM size\n"); + pr_err("unsupported DRAM size 0x%08lx\n", size); return -EINVAL; } @@ -143,7 +143,7 @@ static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, } static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base, - int freq, int size, bool ddr3plus, int ch) + int freq, unsigned long size, bool ddr3plus, int ch) { void __iomem *phy_base = dc_base + 0x00001000; int ret; @@ -162,7 +162,7 @@ static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base, if (ret) return ret; - return umc_dramcont_init(dc_base, ca_base, size, freq, ddr3plus); + return umc_dramcont_init(dc_base, ca_base, freq, size, ddr3plus); } int ph1_sld8_umc_init(const struct uniphier_board_data *bd) @@ -175,7 +175,7 @@ int ph1_sld8_umc_init(const struct uniphier_board_data *bd) for (ch = 0; ch < DRAM_CH_NR; ch++) { ret = umc_ch_init(dc_base, ca_base, bd->dram_freq, - bd->dram_ch[ch].size / SZ_128M, + bd->dram_ch[ch].size, bd->dram_ddr3plus, ch); if (ret) { pr_err("failed to initialize UMC ch%d\n", ch);