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[82.45.1.190]) by mx.google.com with ESMTPSA id i13sm2885845wic.13.2015.05.12.06.25.56 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 12 May 2015 06:25:56 -0700 (PDT) From: Peter Griffin To: u-boot@lists.denx.de, albert.u.boot@aribaud.net, trini@konsulko.com, panto@antoniou-consulting.com, marex@denx.de Cc: Peter Griffin Subject: [PATCH 4/6] hi6553: Add register definition and bitfield header for 6553 pmic Date: Tue, 12 May 2015 14:25:39 +0100 Message-Id: <1431437141-18096-5-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431437141-18096-1-git-send-email-peter.griffin@linaro.org> References: <1431437141-18096-1-git-send-email-peter.griffin@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.griffin@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This pmic is used on the 96boards consumer edition HiKey board. Signed-off-by: Peter Griffin --- arch/arm/include/asm/arch-armv8/hi6553.h | 75 ++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 arch/arm/include/asm/arch-armv8/hi6553.h diff --git a/arch/arm/include/asm/arch-armv8/hi6553.h b/arch/arm/include/asm/arch-armv8/hi6553.h new file mode 100644 index 0000000..d0770e1 --- /dev/null +++ b/arch/arm/include/asm/arch-armv8/hi6553.h @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2015 Linaro + * Peter Griffin + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __HI6553_PMIC_H__ +#define __HI6553_PMIC_H__ + +#define HI6553_DISABLE6_XO_CLK 0x036 + +#define HI6553_DISABLE6_XO_CLK_BB (1 << 0) +#define HI6553_DISABLE6_XO_CLK_CONN (1 << 1) +#define HI6553_DISABLE6_XO_CLK_NFC (1 << 2) +#define HI6553_DISABLE6_XO_CLK_RF1 (1 << 3) +#define HI6553_DISABLE6_XO_CLK_RF2 (1 << 4) + +#define HI6553_VERSION_REG 0x000 +#define HI6553_ENABLE2_LDO1_8 0x029 +#define HI6553_DISABLE2_LDO1_8 0x02a +#define HI6553_ONOFF_STATUS2_LDO1_8 0x02b +#define HI6553_ENABLE3_LDO9_16 0x02c +#define HI6553_DISABLE3_LDO9_16 0x02d +#define HI6553_ONOFF_STATUS3_LDO9_16 0x02e +#define HI6553_PERI_EN_MARK 0x040 +#define HI6553_BUCK2_REG1 0x04a +#define HI6553_BUCK2_REG5 0x04e +#define HI6553_BUCK2_REG6 0x04f +#define HI6553_BUCK3_REG3 0x054 +#define HI6553_BUCK3_REG5 0x056 +#define HI6553_BUCK3_REG6 0x057 +#define HI6553_BUCK4_REG2 0x05b +#define HI6553_BUCK4_REG5 0x05e +#define HI6553_BUCK4_REG6 0x05f +#define HI6553_CLK_TOP0 0x063 +#define HI6553_CLK_TOP3 0x066 +#define HI6553_CLK_TOP4 0x067 +#define HI6553_VSET_BUCK2_ADJ 0x06d +#define HI6553_VSET_BUCK3_ADJ 0x06e +#define HI6553_LDO7_REG_ADJ 0x078 +#define HI6553_LDO10_REG_ADJ 0x07b +#define HI6553_LDO19_REG_ADJ 0x084 +#define HI6553_LDO20_REG_ADJ 0x085 +#define HI6553_DR_LED_CTRL 0x098 +#define HI6553_DR_OUT_CTRL 0x099 +#define HI6553_DR3_ISET 0x09a +#define HI6553_DR3_START_DEL 0x09b +#define HI6553_DR4_ISET 0x09c +#define HI6553_DR4_START_DEL 0x09d +#define HI6553_DR345_TIM_CONF0 0x0a0 +#define HI6553_NP_REG_ADJ1 0x0be +#define HI6553_NP_REG_CHG 0x0c0 +#define HI6553_BUCK01_CTRL2 0x0d9 +#define HI6553_BUCK0_CTRL1 0x0dd +#define HI6553_BUCK0_CTRL5 0x0e1 +#define HI6553_BUCK0_CTRL7 0x0e3 +#define HI6553_BUCK1_CTRL1 0x0e8 +#define HI6553_BUCK1_CTRL5 0x0ec +#define HI6553_BUCK1_CTRL7 0x0ef +#define HI6553_CLK19M2_600_586_EN 0x0fe + +#define HI6553_LED_START_DELAY_TIME 0x00 +#define HI6553_LED_ELEC_VALUE 0x07 +#define HI6553_LED_LIGHT_TIME 0xf0 +#define HI6553_LED_GREEN_ENABLE (1 << 1) +#define HI6553_LED_OUT_CTRL 0x00 + +#define HI6553_PMU_V300 0x30 +#define HI6553_PMU_V310 0x31 + +unsigned char hi6553_read_8(unsigned int offset); +void hi6553_write_8(unsigned int offset, unsigned char value); + +#endif /* __HI6553_PMIC_H__ */