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[78.53.81.156]) by mx.google.com with ESMTPSA id s9sm4867327obu.4.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 19 Sep 2013 09:08:46 -0700 (PDT) From: Andre Przywara To: trini@ti.com, albert.u.boot@aribaud.net, christoffer.dall@linaro.org Cc: u-boot@lists.denx.de, marc.zyngier@arm.com, peter.maydell@linaro.org, agraf@suse.de, geoff.levand@linaro.org, kvmarm@lists.cs.columbia.edu, Masahiro Yamada , Nikolay Nikolaev , patches@linaro.org, Andre Przywara Subject: [PATCH v5 8/8] ARM: VExpress: enable ARMv7 virt support for VExpress A15 Date: Thu, 19 Sep 2013 18:06:46 +0200 Message-Id: <1379606806-439-9-git-send-email-andre.przywara@linaro.org> X-Mailer: git-send-email 1.7.12.1 In-Reply-To: <1379606806-439-1-git-send-email-andre.przywara@linaro.org> References: <1379606806-439-1-git-send-email-andre.przywara@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: andre.przywara@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , To enable hypervisors utilizing the ARMv7 virtualization extension on the Versatile Express board with the A15 core tile, we add the required configuration variable. Also we define the board specific smp_set_cpu_boot_addr() function to set the start address for secondary cores in the VExpress specific manner. There is no need to provide a custom smp_waitloop() function here. This also serves as an example for what to do when adding support for new boards. Signed-off-by: Andre Przywara --- board/armltd/vexpress/vexpress_common.c | 15 +++++++++++++++ include/configs/vexpress_ca15_tc2.h | 5 +++++ 2 files changed, 20 insertions(+) Changes: v3..v4: add VExpress' smp_set_core_boot_addr() and smp_waitloop() v4..v5: remove VExpress specific smp_waitloop() in favor of the generic implementation diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c index 4c7a7f4..56febd9 100644 --- a/board/armltd/vexpress/vexpress_common.c +++ b/board/armltd/vexpress/vexpress_common.c @@ -256,3 +256,18 @@ ulong get_tbclk(void) { return (ulong)CONFIG_SYS_HZ; } + +#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) +/* Setting the address at which secondary cores start from. + * Versatile Express uses one address for all cores, so ignore corenr + */ +void smp_set_core_boot_addr(unsigned long addr, int corenr) +{ + /* The SYSFLAGS register on VExpress needs to be cleared first + * by writing to the next address, since any writes to the address + * at offset 0 will only be ORed in + */ + writel(~0, CONFIG_SYSFLAGS_ADDR + 4); + writel(addr, CONFIG_SYSFLAGS_ADDR); +} +#endif diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index 89ce1c7..0806034 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -15,4 +15,9 @@ #include "vexpress_common.h" #define CONFIG_BOOTP_VCI_STRING "U-boot.armv7.vexpress_ca15x2_tc2" +#define CONFIG_SYSFLAGS_ADDR 0x1c010030 +#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR + +#define CONFIG_ARMV7_VIRT + #endif