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[203.254.224.34]) by mx.google.com with ESMTP id ct5si20965640pbb.131.1969.12.31.16.00.00; Wed, 11 Sep 2013 02:59:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.34 as permitted sender) client-ip=203.254.224.34; Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSY00MNVH3GV0R0@mailout4.samsung.com>; Wed, 11 Sep 2013 18:59:43 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.124]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id B1.8A.29948.E0F30325; Wed, 11 Sep 2013 18:59:42 +0900 (KST) X-AuditID: cbfee691-b7f4a6d0000074fc-33-52303f0efc04 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 15.A5.09055.E0F30325; Wed, 11 Sep 2013 18:59:42 +0900 (KST) Received: from localhost.localdomain.com ([107.108.73.95]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSY0040PH3CE280@mmp2.samsung.com>; Wed, 11 Sep 2013 18:59:42 +0900 (KST) From: Rajeshwari S Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, u-boot-review@google.com, panto@antoniou-consulting.com, alim.akhtar@samsung.com Subject: [PATCH 01/12 V3] EXYNOS5: Create a common board file Date: Wed, 11 Sep 2013 15:31:13 +0530 Message-id: <1378893684-27733-2-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.11.7 In-reply-to: <1378893684-27733-1-git-send-email-rajeshwari.s@samsung.com> References: <1378893684-27733-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpgkeLIzCtJLcpLzFFi42JZI2JSo8tnbxBkcP+VmcWDedvYLB6uv8li 0XGkhdFi1+3JLBZTDn9hsfi2ZRujxfLXG9kt3u7tZHfg8Jj3cyKTx+yGiyweCzaVety5tofN 4+ydHYwefVtWMQawRXHZpKTmZJalFunbJXBlfPidXfBwC2PF92ubWRsY101k7GLk5JAQMJH4 /PcBO4QtJnHh3nq2LkYuDiGBpYwS6zZ/Y4Mpuvh8LwtEYjqjxI7vxxghnC4miZmXjjJ1MXJw sAFVbTyRANIgIiAh8av/KtgGZoENjBJzfnGD2MICthI7n1xnBilnEVCV2DkvBSTMK+AhMelb OwvELkWJGUuegbVyCnhKtJ5pBDtOCKjm6faN7CBrJQTWsUvceXeTCSTBIiAg8W3yIRaQmRIC shKbDjBDzJGUOLjiBssERuEFjAyrGEVTC5ILipPSi0z1ihNzi0vz0vWS83M3MQJD//S/ZxN3 MN4/YH2IMRlo3ERmKdHkfGDs5JXEGxqbGVmYmpgaG5lbmpEmrCTOq95iHSgkkJ5YkpqdmlqQ WhRfVJqTWnyIkYmDU6qBUfh41eZJz/2nVc6uYVqhP8Hd7KJ3wIb8R3flDRvfJQdJ9u7N3Rs1 qbd1o97k6A+Pa1y+lPxPEVrP+If17Z1b3F6KheU9MwU1dje4frm4gudo1ip2238bV8vXHeaL F/Dk/LwpkrtmYcnDuQt1swzjlbZflPqYc3L6YY9m6St7VlVZLAngP9N5VYmlOCPRUIu5qDgR AHrVbIqTAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLIsWRmVeSWpSXmKPExsVy+t9jQV0+e4Mgg939WhYP5m1js3i4/iaL RceRFkaLXbcns1hMOfyFxeLblm2MFstfb2S3eLu3k92Bw2Pez4lMHrMbLrJ4LNhU6nHn2h42 j7N3djB69G1ZxRjAFtXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtq q+TiE6DrlpkDdJGSQlliTilQKCCxuFhJ3w7ThNAQN10LmMYIXd+QILgeIwM0kLCGMePD7+yC h1sYK75f28zawLhuImMXIyeHhICJxMXne1kgbDGJC/fWs3UxcnEICUxnlNjx/RgjhNPFJDHz 0lGmLkYODjagjo0nEkAaRAQkJH71XwUbxCywgVFizi9uEFtYwFZi55PrzCDlLAKqEjvnpYCE eQU8JCZ9a4fapSgxY8kzsFZOAU+J1jON7CC2EFDN0+0b2Scw8i5gZFjFKJpakFxQnJSea6hX nJhbXJqXrpecn7uJERxZz6R2MK5ssDjEKMDBqMTDe0NOP0iINbGsuDL3EKMEB7OSCO8DU4Mg Id6UxMqq1KL8+KLSnNTiQ4zJQEdNZJYSTc4HRn1eSbyhsYm5qbGppYmFiZklacJK4rwHWq0D hQTSE0tSs1NTC1KLYLYwcXBKNTAGbpnJeW2x+ey2GQrTp3W/dXXxSEh6rs3kzxinfu1DzXSv fEbWbXVpHCeiwjaJ/DU4G/iAO7LVw+77iu88BhuOX1o26b7f756Sg82i5ceNZ0908HN3LC77 F5VVv8iwoerteo6tdyOezHIxyP1iY2ezOafteHDLdr75D1xjw5e2WXye/frrh0olluKMREMt 5qLiRABGu1d28AIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rajeshwari.s@samsung.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Create a common board.c file for all functions which are common across all EXYNOS5 platforms. exynos_init function is provided for platform cpecific code. Signed-off-by: Rajeshwari S Shinde Acked-by: Simon Glass --- Changes in V2: - None Changes in V3: - None arch/arm/include/asm/arch-exynos/board.h | 17 ++ board/samsung/common/Makefile | 4 + board/samsung/common/board.c | 312 +++++++++++++++++++++++++++++++ board/samsung/smdk5250/exynos5-dt.c | 269 +------------------------- board/samsung/smdk5250/smdk5250.c | 182 +----------------- include/configs/exynos5250-dt.h | 2 + 6 files changed, 342 insertions(+), 444 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/board.h create mode 100644 board/samsung/common/board.c diff --git a/arch/arm/include/asm/arch-exynos/board.h b/arch/arm/include/asm/arch-exynos/board.h new file mode 100644 index 0000000..243fb12 --- /dev/null +++ b/arch/arm/include/asm/arch-exynos/board.h @@ -0,0 +1,17 @@ +/* + * (C) Copyright 2013 Samsung Electronics + * Rajeshwari Shinde + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _EXYNOS_BOARD_H +#define _EXYNOS_BOARD_H + +/* + * Exynos baord specific changes for + * board_init + */ +int exynos_init(void); + +#endif /* EXYNOS_BOARD_H */ diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile index 9e48a7b..eab8ab2 100644 --- a/board/samsung/common/Makefile +++ b/board/samsung/common/Makefile @@ -11,6 +11,10 @@ LIB = $(obj)libsamsung.o COBJS-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o +ifeq ($(CONFIG_SPL_BUILD),) +COBJS-$(CONFIG_BOARD_COMMON) += board.o +endif + SRCS := $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c new file mode 100644 index 0000000..bfcfbdf --- /dev/null +++ b/board/samsung/common/board.c @@ -0,0 +1,312 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +struct local_info { + struct cros_ec_dev *cros_ec_dev; /* Pointer to cros_ec device */ + int cros_ec_err; /* Error for cros_ec, 0 if ok */ +}; + +static struct local_info local; + +#if defined CONFIG_EXYNOS_TMU +/* + * Boot Time Thermal Analysis for SoC temperature threshold breach + */ +static void boot_temp_check(void) +{ + int temp; + + switch (tmu_monitor(&temp)) { + case TMU_STATUS_NORMAL: + break; + /* Status TRIPPED ans WARNING means corresponding threshold breach */ + case TMU_STATUS_TRIPPED: + puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); + set_ps_hold_ctrl(); + hang(); + break; + case TMU_STATUS_WARNING: + puts("EXYNOS_TMU: WARNING! Temperature very high\n"); + break; + /* + * TMU_STATUS_INIT means something is wrong with temperature sensing + * and TMU status was changed back from NORMAL to INIT. + */ + case TMU_STATUS_INIT: + default: + debug("EXYNOS_TMU: Unknown TMU state\n"); + } +} +#endif + +int board_init(void) +{ + gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); +#if defined CONFIG_EXYNOS_TMU + if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { + debug("%s: Failed to init TMU\n", __func__); + return -1; + } + boot_temp_check(); +#endif + +#ifdef CONFIG_EXYNOS_SPI + spi_init(); +#endif + return exynos_init(); +} + +int dram_init(void) +{ + int i; + u32 addr; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); + gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); + } + return 0; +} + +void dram_init_banksize(void) +{ + int i; + u32 addr, size; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); + size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); + + gd->bd->bi_dram[i].start = addr; + gd->bd->bi_dram[i].size = size; + } +} + +static int board_uart_init(void) +{ + int err, uart_id, ret = 0; + + for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { + err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); + if (err) { + debug("UART%d not configured\n", + (uart_id - PERIPH_ID_UART0)); + ret |= err; + } + } + return ret; +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ + int err; + err = board_uart_init(); + if (err) { + debug("UART init failed\n"); + return err; + } +#ifdef CONFIG_SYS_I2C_INIT_BOARD + board_i2c_init(gd->fdt_blob); +#endif + return err; +} +#endif + +struct cros_ec_dev *board_get_cros_ec_dev(void) +{ + return local.cros_ec_dev; +} + +static int board_init_cros_ec_devices(const void *blob) +{ + local.cros_ec_err = cros_ec_init(blob, &local.cros_ec_dev); + if (local.cros_ec_err) + return -1; /* Will report in board_late_init() */ + + return 0; +} + +#if defined(CONFIG_POWER) +static int pmic_reg_update(struct pmic *p, int reg, uint regval) +{ + u32 val; + int ret = 0; + + ret = pmic_reg_read(p, reg, &val); + if (ret) { + debug("%s: PMIC %d register read failed\n", __func__, reg); + return -1; + } + val |= regval; + ret = pmic_reg_write(p, reg, val); + if (ret) { + debug("%s: PMIC %d register write failed\n", __func__, reg); + return -1; + } + return 0; +} + +int power_init_board(void) +{ + struct pmic *p; + + set_ps_hold_ctrl(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + + if (pmic_init(I2C_PMIC)) + return -1; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, + MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) + return -1; + + /* VDD_MIF */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, + MAX77686_BUCK1OUT_1V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK1OUT); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, + MAX77686_BUCK1CTRL_EN)) + return -1; + + /* VDD_ARM */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK2DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, + MAX77686_BUCK2CTRL_ON)) + return -1; + + /* VDD_INT */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK3DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_G3D */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK4DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_LDO2 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, + MAX77686_LD02CTRL1_1_5V | EN_LDO)) + return -1; + + /* VDD_LDO3 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, + MAX77686_LD03CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO5 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, + MAX77686_LD05CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO10 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, + MAX77686_LD10CTRL1_1_8V | EN_LDO)) + return -1; + + return 0; +} +#endif + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ + stdio_print_current_devices(); + + if (local.cros_ec_err) { + /* Force console on */ + gd->flags &= ~GD_FLG_SILENT; + + printf("cros-ec communications failure %d\n", + local.cros_ec_err); + puts("\nPlease reset with Power+Refresh\n\n"); + panic("Cannot init cros-ec device"); + return -1; + } + return 0; +} +#endif + +int arch_early_init_r(void) +{ +#ifdef CONFIG_CROS_EC + if (board_init_cros_ec_devices(gd->fdt_blob)) { + printf("%s: Failed to init EC\n", __func__); + return 0; + } +#endif + + return 0; +} diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c index bb4a82f..36634e6 100644 --- a/board/samsung/smdk5250/exynos5-dt.c +++ b/board/samsung/smdk5250/exynos5-dt.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -25,44 +26,8 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined CONFIG_EXYNOS_TMU -/* - * Boot Time Thermal Analysis for SoC temperature threshold breach - */ -static void boot_temp_check(void) -{ - int temp; - - switch (tmu_monitor(&temp)) { - /* Status TRIPPED ans WARNING means corresponding threshold breach */ - case TMU_STATUS_TRIPPED: - puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); - set_ps_hold_ctrl(); - hang(); - break; - case TMU_STATUS_WARNING: - puts("EXYNOS_TMU: WARNING! Temperature very high\n"); - break; - /* - * TMU_STATUS_INIT means something is wrong with temperature sensing - * and TMU status was changed back from NORMAL to INIT. - */ - case TMU_STATUS_INIT: - default: - debug("EXYNOS_TMU: Unknown TMU state\n"); - } -} -#endif - -struct local_info { - struct cros_ec_dev *cros_ec_dev; /* Pointer to cros_ec device */ - int cros_ec_err; /* Error for cros_ec, 0 if ok */ -}; - -static struct local_info local; - #ifdef CONFIG_USB_EHCI_EXYNOS -int board_usb_vbus_init(void) +static void board_usb_vbus_init(void) { struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); @@ -72,13 +37,11 @@ int board_usb_vbus_init(void) /* VBUS turn ON time */ mdelay(3); - - return 0; } #endif #ifdef CONFIG_SOUND_MAX98095 -static void board_enable_audio_codec(void) +static void board_enable_audio_codec(void) { struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); @@ -89,39 +52,8 @@ static void board_enable_audio_codec(void) } #endif -struct cros_ec_dev *board_get_cros_ec_dev(void) -{ - return local.cros_ec_dev; -} - -static int board_init_cros_ec_devices(const void *blob) +int exynos_init(void) { - local.cros_ec_err = cros_ec_init(blob, &local.cros_ec_dev); - if (local.cros_ec_err) - return -1; /* Will report in board_late_init() */ - - return 0; -} - -int board_init(void) -{ - gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); - -#if defined CONFIG_EXYNOS_TMU - if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { - debug("%s: Failed to init TMU\n", __func__); - return -1; - } - boot_temp_check(); -#endif - -#ifdef CONFIG_EXYNOS_SPI - spi_init(); -#endif - - if (board_init_cros_ec_devices(gd->fdt_blob)) - return -1; - #ifdef CONFIG_USB_EHCI_EXYNOS board_usb_vbus_init(); #endif @@ -131,149 +63,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ - int i; - u32 addr; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); - } - return 0; -} - -#if defined(CONFIG_POWER) -static int pmic_reg_update(struct pmic *p, int reg, uint regval) -{ - u32 val; - int ret = 0; - - ret = pmic_reg_read(p, reg, &val); - if (ret) { - debug("%s: PMIC %d register read failed\n", __func__, reg); - return -1; - } - val |= regval; - ret = pmic_reg_write(p, reg, val); - if (ret) { - debug("%s: PMIC %d register write failed\n", __func__, reg); - return -1; - } - return 0; -} - -int power_init_board(void) -{ - struct pmic *p; - - set_ps_hold_ctrl(); - - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - if (pmic_init(I2C_PMIC)) - return -1; - - p = pmic_get("MAX77686_PMIC"); - if (!p) - return -ENODEV; - - if (pmic_probe(p)) - return -1; - - if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) - return -1; - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, - MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) - return -1; - - /* VDD_MIF */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, - MAX77686_BUCK1OUT_1V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK1OUT); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, - MAX77686_BUCK1CTRL_EN)) - return -1; - - /* VDD_ARM */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, - MAX77686_BUCK2DVS1_1_3V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK2DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, - MAX77686_BUCK2CTRL_ON)) - return -1; - - /* VDD_INT */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, - MAX77686_BUCK3DVS1_1_0125V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK3DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, - MAX77686_BUCK3CTRL_ON)) - return -1; - - /* VDD_G3D */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, - MAX77686_BUCK4DVS1_1_2V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK4DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, - MAX77686_BUCK3CTRL_ON)) - return -1; - - /* VDD_LDO2 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, - MAX77686_LD02CTRL1_1_5V | EN_LDO)) - return -1; - - /* VDD_LDO3 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, - MAX77686_LD03CTRL1_1_8V | EN_LDO)) - return -1; - - /* VDD_LDO5 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, - MAX77686_LD05CTRL1_1_8V | EN_LDO)) - return -1; - - /* VDD_LDO10 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, - MAX77686_LD10CTRL1_1_8V | EN_LDO)) - return -1; - - return 0; -} -#endif - -void dram_init_banksize(void) -{ - int i; - u32 addr, size; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); - - gd->bd->bi_dram[i].start = addr; - gd->bd->bi_dram[i].size = size; - } -} - static int decode_sromc(const void *blob, struct fdt_sromc *config) { int err; @@ -377,37 +166,6 @@ int board_mmc_init(bd_t *bis) } #endif -static int board_uart_init(void) -{ - int err, uart_id, ret = 0; - - for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { - err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); - if (err) { - debug("UART%d not configured\n", - (uart_id - PERIPH_ID_UART0)); - ret |= err; - } - } - return ret; -} - -#ifdef CONFIG_BOARD_EARLY_INIT_F -int board_early_init_f(void) -{ - int err; - err = board_uart_init(); - if (err) { - debug("UART init failed\n"); - return err; - } -#ifdef CONFIG_SYS_I2C_INIT_BOARD - board_i2c_init(gd->fdt_blob); -#endif - return err; -} -#endif - #ifdef CONFIG_LCD void exynos_cfg_lcd_gpio(void) { @@ -431,22 +189,3 @@ void exynos_set_dp_phy(unsigned int onoff) set_dp_phy_ctrl(onoff); } #endif - -#ifdef CONFIG_BOARD_LATE_INIT -int board_late_init(void) -{ - stdio_print_current_devices(); - - if (local.cros_ec_err) { - /* Force console on */ - gd->flags &= ~GD_FLG_SILENT; - - printf("cros-ec communications failure %d\n", - local.cros_ec_err); - puts("\nPlease reset with Power+Refresh\n\n"); - panic("Cannot init cros-ec device"); - return -1; - } - return 0; -} -#endif diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 97fe0ad..943c29a 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -26,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_USB_EHCI_EXYNOS -int board_usb_vbus_init(void) +static int board_usb_vbus_init(void) { struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); @@ -53,13 +54,8 @@ static void board_enable_audio_codec(void) } #endif -int board_init(void) +int exynos_init(void) { - gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); - -#ifdef CONFIG_EXYNOS_SPI - spi_init(); -#endif #ifdef CONFIG_USB_EHCI_EXYNOS board_usb_vbus_init(); #endif @@ -69,147 +65,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ - int i; - u32 addr; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); - } - return 0; -} - -#if defined(CONFIG_POWER) -static int pmic_reg_update(struct pmic *p, int reg, uint regval) -{ - u32 val; - int ret = 0; - - ret = pmic_reg_read(p, reg, &val); - if (ret) { - debug("%s: PMIC %d register read failed\n", __func__, reg); - return -1; - } - val |= regval; - ret = pmic_reg_write(p, reg, val); - if (ret) { - debug("%s: PMIC %d register write failed\n", __func__, reg); - return -1; - } - return 0; -} - -int power_init_board(void) -{ - struct pmic *p; - - set_ps_hold_ctrl(); - - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - if (pmic_init(I2C_PMIC)) - return -1; - - p = pmic_get("MAX77686_PMIC"); - if (!p) - return -ENODEV; - - if (pmic_probe(p)) - return -1; - - if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) - return -1; - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, - MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) - return -1; - - /* VDD_MIF */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, - MAX77686_BUCK1OUT_1_05V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK1OUT); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, - MAX77686_BUCK1CTRL_EN)) - return -1; - - /* VDD_ARM */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, - MAX77686_BUCK2DVS1_1_3V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK2DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, - MAX77686_BUCK2CTRL_ON)) - return -1; - - /* VDD_INT */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, - MAX77686_BUCK3DVS1_1_0125V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK3DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, - MAX77686_BUCK3CTRL_ON)) - return -1; - - /* VDD_G3D */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, - MAX77686_BUCK4DVS1_1_2V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK4DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, - MAX77686_BUCK3CTRL_ON)) - return -1; - - /* VDD_LDO2 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, - MAX77686_LD02CTRL1_1_5V | EN_LDO)) - return -1; - - /* VDD_LDO3 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, - MAX77686_LD03CTRL1_1_8V | EN_LDO)) - return -1; - - /* VDD_LDO5 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, - MAX77686_LD05CTRL1_1_8V | EN_LDO)) - return -1; - - /* VDD_LDO10 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, - MAX77686_LD10CTRL1_1_8V | EN_LDO)) - return -1; - - return 0; -} -#endif - -void dram_init_banksize(void) -{ - int i; - u32 addr, size; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); - gd->bd->bi_dram[i].start = addr; - gd->bd->bi_dram[i].size = size; - } -} - int board_eth_init(bd_t *bis) { #ifdef CONFIG_SMC911X @@ -301,21 +156,6 @@ int board_mmc_init(bd_t *bis) } #endif -static int board_uart_init(void) -{ - int err, uart_id, ret = 0; - - for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { - err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); - if (err) { - debug("UART%d not configured\n", - (uart_id - PERIPH_ID_UART0)); - ret |= err; - } - } - return ret; -} - void board_i2c_init(const void *blob) { int i; @@ -326,22 +166,6 @@ void board_i2c_init(const void *blob) } } -#ifdef CONFIG_BOARD_EARLY_INIT_F -int board_early_init_f(void) -{ - int err; - err = board_uart_init(); - if (err) { - debug("UART init failed\n"); - return err; - } -#ifdef CONFIG_SYS_I2C_INIT_BOARD - board_i2c_init(NULL); -#endif - return err; -} -#endif - #ifdef CONFIG_LCD void exynos_cfg_lcd_gpio(void) { diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 2b93a45..26ef7fa 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -21,6 +21,8 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_BOARD_COMMON +#define CONFIG_ARCH_EARLY_INIT_R /* Enable fdt support for Exynos5250 */ #define CONFIG_ARCH_DEVICE_TREE exynos5250