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[203.254.224.25]) by mx.google.com with ESMTP id uh1si28800089pab.36.2013.05.29.22.17.25 for ; Wed, 29 May 2013 22:17:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.25 as permitted sender) client-ip=203.254.224.25; Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MNL00K0QINTDNC0@mailout2.samsung.com> for patches@linaro.org; Thu, 30 May 2013 14:17:20 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id B1.91.03969.0E0E6A15; Thu, 30 May 2013 14:17:20 +0900 (KST) X-AuditID: cbfee68f-b7f436d000000f81-f4-51a6e0e0339f Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 11.5B.28381.0E0E6A15; Thu, 30 May 2013 14:17:20 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MNL007IHIO8I4K0@mmp1.samsung.com>; Thu, 30 May 2013 14:17:20 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, u-boot-review@google.com, jagannadh.teki@gmail.com Subject: [PATCH 2/2 V3] spi: exynos: Support a delay after deactivate Date: Thu, 30 May 2013 10:49:51 +0530 Message-id: <1369891191-28274-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1369891191-28274-1-git-send-email-rajeshwari.s@samsung.com> References: <1369891191-28274-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrOLMWRmVeSWpSXmKPExsWyRsSkTvfBg2WBBu13dCx2bW1hteg40sJo MeXwFxaLb1u2MVosf72R3eLt3k52BzaP2Q0XWTx2zrrL7rFgU6nHnWt72DzO3tnB6NG3ZRVj AFsUl01Kak5mWWqRvl0CV8bfGVdYCn5IVHzfuoGxgXGlSBcjJ4eEgInEjoP72CFsMYkL99az dTFycQgJLGWUuP34GCtM0cnWLSwQiUWMElue74JyJjJJ3D61jRGkik3ASGLryWlgtoiAhMSv /qtgNrNAicSs08fAbGEBV4kpTVuYQWwWAVWJzyf2sIDYvAIeEjNunmWE2KYgcWzqV7DNnAKe Erc/97GB2EJANWu7djKBLJYQmM4uMevsOyaIQQIS3yYfAhrEAZSQldh0gBlijqTEwRU3WCYw Ci9gZFjFKJpakFxQnJReZKxXnJhbXJqXrpecn7uJERjop/8969/BePeA9SHGZKBxE5mlRJPz gZGSVxJvaGxmZGFqYmpsZG5pRpqwkjivWot1oJBAemJJanZqakFqUXxRaU5q8SFGJg5OqQZG jZzj8gb2c0J/RgUvl02/WuTBaFt1z3f9hGmvZ9xcKzRTat2v9cdvPgufcjLj/E7LoP02Lfev flPk3VtoPrPSetuhmR5JEz7N47bcURPp/vv51dzKNeyBU/O7ju4psf80LVpawSyOf69qqqvV vPsXLxXlMD8+7KnUpbre9eb/vdLKHBZxZUZrlViKMxINtZiLihMBd8bHqYoCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCIsWRmVeSWpSXmKPExsVy+t9jAd0HD5YFGvxfqmyxa2sLq0XHkRZG iymHv7BYfNuyjdFi+euN7BZv93ayO7B5zG64yOKxc9Zddo8Fm0o97lzbw+Zx9s4ORo++LasY A9iiGhhtMlITU1KLFFLzkvNTMvPSbZW8g+Od403NDAx1DS0tzJUU8hJzU22VXHwCdN0yc4Du UFIoS8wpBQoFJBYXK+nbYZoQGuKmawHTGKHrGxIE12NkgAYS1jBm/J1xhaXgh0TF960bGBsY V4p0MXJySAiYSJxs3cICYYtJXLi3nq2LkYtDSGARo8SW57tYIJyJTBK3T21jBKliEzCS2Hpy GpgtIiAh8av/KpjNLFAiMev0MTBbWMBVYkrTFmYQm0VAVeLziT1gG3gFPCRm3DzLCLFNQeLY 1K+sIDangKfE7c99bCC2EFDN2q6dTBMYeRcwMqxiFE0tSC4oTkrPNdQrTswtLs1L10vOz93E CI6jZ1I7GFc2WBxiFOBgVOLh3aC1LFCINbGsuDL3EKMEB7OSCO/8vUAh3pTEyqrUovz4otKc 1OJDjMlAV01klhJNzgfGeF5JvKGxibmpsamliYWJmSVpwkrivAdarQOFBNITS1KzU1MLUotg tjBxcEo1MCqpuNUdm9u9b5J1nsQF3kB2gczgR5Hdz1Myr4Wc6F67IfnvmvBgpTk2XvdUetUM a0/lT5M4vOOsOucEkWtL87q/u8TwzmYJd2IS6ze93jX/tafyJREpD+0Np7o4Sl7cCvQ7aj3t t98D7sUuE7OybF4G829Kudz8SNh7ldhar2kZOiq15499UWIpzkg01GIuKk4EAJmOflHnAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQmVjOoNY3WrO7IVGz/Uwtjkby++zFt1qrQMHZ/M1xe/wOTcf+xS3wx5CPIio4fcbeC6D7Nq X-Original-Sender: rajeshwari.s@samsung.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::22c is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , For devices that need some time to react after a spi transaction finishes, add the ability to set a delay. Implement this as a delay on the first/next transaction to avoid any delay in the fairly common case where a SPI transaction is followed by other processing. Based on: "[U-Boot] [PATCH 0/2 V5] spi: Enable SPI_PREAMBLE Mode" Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde --- Changes in V2: - None. Changes in V3: - Rebased on "[PATCH 0/2 V5] spi: Enable SPI_PREAMBLE Mode" drivers/spi/exynos_spi.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 01378d0..03cf503 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -38,6 +38,7 @@ struct spi_bus { struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ int node; + uint deactivate_delay_us; /* Delay to wait after deactivate */ }; /* A list of spi buses that we know about */ @@ -52,6 +53,8 @@ struct exynos_spi_slave { enum periph_id periph_id; /* Peripheral ID for this device */ unsigned int fifo_size; int skip_preamble; + struct spi_bus *bus; /* Pointer to our SPI bus info */ + ulong last_transaction_us; /* Time of last transaction end */ }; static struct spi_bus *spi_get_bus(unsigned dev_index) @@ -97,6 +100,7 @@ struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, } bus = &spi_bus[busnum]; + spi_slave->bus = bus; spi_slave->regs = bus->regs; spi_slave->mode = mode; spi_slave->periph_id = bus->periph_id; @@ -107,6 +111,7 @@ struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, spi_slave->fifo_size = 256; spi_slave->skip_preamble = 0; + spi_slave->last_transaction_us = timer_get_us(); spi_slave->freq = bus->frequency; if (max_hz) @@ -371,9 +376,21 @@ void spi_cs_activate(struct spi_slave *slave) { struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); + /* If it's too soon to do another transaction, wait */ + if (spi_slave->bus->deactivate_delay_us && + spi_slave->last_transaction_us) { + ulong delay_us; /* The delay completed so far */ + delay_us = timer_get_us() - spi_slave->last_transaction_us; + if (delay_us < spi_slave->bus->deactivate_delay_us) + udelay(spi_slave->bus->deactivate_delay_us - delay_us); + } clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); debug("Activate CS, bus %d\n", spi_slave->slave.bus); spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; + + /* Remember time of this transaction so we can honour the bus delay */ + if (spi_slave->bus->deactivate_delay_us) + spi_slave->last_transaction_us = timer_get_us(); } /** @@ -423,6 +440,8 @@ static int spi_get_config(const void *blob, int node, struct spi_bus *bus) /* Use 500KHz as a suitable default */ bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 500000); + bus->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); return 0; }