From patchwork Sat Apr 27 06:12:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amar X-Patchwork-Id: 16460 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yh0-f69.google.com (mail-yh0-f69.google.com [209.85.213.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E618224AAB for ; Sat, 27 Apr 2013 06:10:16 +0000 (UTC) Received: by mail-yh0-f69.google.com with SMTP id z12sf6658031yhz.4 for ; Fri, 26 Apr 2013 23:09:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:mime-version:x-beenthere:x-received:received-spf :x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-auditid:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-brightmail-tracker:x-brightmail-tracker :dlp-filter:x-mtr:x-cfilter-loop:x-gm-message-state :x-original-sender:x-original-authentication-results:precedence :mailing-list:list-id:x-google-group-id:list-post:list-help :list-archive:list-unsubscribe; bh=F6MM9cNM6dWgLeLbvMXnfGcquSpP/cHVzwfqA2AL5J8=; b=Yo68IFCTsJl/M7gZ5C3gmGzuJ/JGRlEq10xA8vnRH4VzEnFcAIreYG+GyuIa/okbrf a/+fRvk85QSOWGddpKDjTjOjJvey2YbvOHLaoaGKJkV4Bu7zxWXdXcbTxByIoy0Iz6p+ OmsTH1ZxM++CCYg/7mN5y3o7kcMzeo915X4ubtUnoeDhhMG6DtvJZ/gG46P+5SpSrGSo zGsWkwnettC/YXJ+i9+LYrbrXd3n/e4EjWP++deBV4Q3KqPVe6duUQ/tccwAqLPQAcsN 97VEzFkzDf5bfQK94xBKH3q7wiZOB/JV2jSO2UPlhgbwQU2nA7aMWYh/pNNp0rH6/AkA d6Bw== X-Received: by 10.224.185.17 with SMTP id cm17mr18881623qab.6.1367042959604; Fri, 26 Apr 2013 23:09:19 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.50.226 with SMTP id f2ls2135774qeo.13.gmail; Fri, 26 Apr 2013 23:09:19 -0700 (PDT) X-Received: by 10.58.214.231 with SMTP id od7mr30358752vec.44.1367042959400; Fri, 26 Apr 2013 23:09:19 -0700 (PDT) Received: from mail-vb0-x230.google.com (mail-vb0-x230.google.com [2607:f8b0:400c:c02::230]) by mx.google.com with ESMTPS id p20si6691744veh.21.2013.04.26.23.09.19 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 26 Apr 2013 23:09:19 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c02::230 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c02::230; Received: by mail-vb0-f48.google.com with SMTP id p13so4094428vbe.35 for ; Fri, 26 Apr 2013 23:09:19 -0700 (PDT) X-Received: by 10.58.144.231 with SMTP id sp7mr40536veb.34.1367042959200; Fri, 26 Apr 2013 23:09:19 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.58.127.98 with SMTP id nf2csp96733veb; Fri, 26 Apr 2013 23:09:18 -0700 (PDT) X-Received: by 10.66.221.105 with SMTP id qd9mr34301973pac.101.1367042958001; Fri, 26 Apr 2013 23:09:18 -0700 (PDT) Received: from mailout4.samsung.com (mailout4.samsung.com. [203.254.224.34]) by mx.google.com with ESMTP id pt2si12550694pbb.79.2013.04.26.23.09.17 for ; Fri, 26 Apr 2013 23:09:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of amarendra.xt@samsung.com designates 203.254.224.34 as permitted sender) client-ip=203.254.224.34; Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MLW003ZEH3DLXA0@mailout4.samsung.com>; Sat, 27 Apr 2013 15:09:16 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.122]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 83.29.31024.C8B6B715; Sat, 27 Apr 2013 15:09:16 +0900 (KST) X-AuditID: cbfee68d-b7f016d000007930-87-517b6b8cfbbd Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 3F.18.08957.B8B6B715; Sat, 27 Apr 2013 15:09:15 +0900 (KST) Received: from amarendra-desktop.sisodomain.com ([107.108.73.18]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MLW00DPDH2TOT50@mmp2.samsung.com>; Sat, 27 Apr 2013 15:09:15 +0900 (KST) From: amar_g To: u-boot@lists.denx.de, jh80.chung@samsung.com Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, afleming@gmail.com, hs@denx.de, Amar Subject: [PATCH V9 6/9] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT Date: Sat, 27 Apr 2013 11:42:57 +0530 Message-id: <1367043180-6756-7-git-send-email-amarendra.xt@samsung.com> X-Mailer: git-send-email 1.7.3.rc2 In-reply-to: <1367043180-6756-1-git-send-email-amarendra.xt@samsung.com> References: <1367043180-6756-1-git-send-email-amarendra.xt@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpnkeLIzCtJLcpLzFFi42JZI2JSpduTXR1oMOEWr8WN6z/ZLL4s6GS3 eLj+JovFjjv3mS1u/Gpjteg40sJoMeXwFxaLb1u2MVq83dvJ7sDpMbvhIovHvFknWDx2zrrL 7nHn2h42j7N3djB69G1ZxRjAFsVlk5Kak1mWWqRvl8CVcXvpe/aCM/sYKz7vl29g/DeTsYuR k0NCwERi+fUp7BC2mMSFe+vZuhi5OIQEljJK3G2/zgJTdGDTe2aIxHRGie9nj7OBJIQEJjBJ fF2UCWKzCahLPPm0lhXEFhEwkJj+ZDsrSAOzwHxGicXfHgGt4OAQFoiUWL/THaSGRUBVYtGT Y2BzeAXcJXY3P2KGWKYkcX7ja7A5nAIeEv9ufGaG2OUusW/aVLCZEgK72CVa39xjhhgkIPFt 8iEWkPkSArISmw5AzZGUOLjiBssERuEFjAyrGEVTC5ILipPSiwz1ihNzi0vz0vWS83M3MQIj 4fS/Z707GG8fsD7EmAw0biKzlGhyPjCS8kriDY3NjCxMTUyNjcwtzUgTVhLnVWuxDhQSSE8s Sc1OTS1ILYovKs1JLT7EyMTBKdXAWLNw0eVZ25MUi3RWCLKcmLP7/kLXwpeB/u9/hdc/vlD5 b1bxNBeuzSGJUw7Juzkk8i0+fvRQC3vE+VPLOPkmLLgZv7+CNVI3y+Ox75pl5+vvzmzNW7T1 bU1vzZU7LgvsufJXv6xctLVjLrtElhjL99TV2QXSexkYuw54repYtf3RhJncrpl19UosxRmJ hlrMRcWJAFsuhBaaAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCIsWRmVeSWpSXmKPExsVy+t9jQd3u7OpAg7OXbSxuXP/JZvFlQSe7 xcP1N1ksdty5z2xx41cbq0XHkRZGiymHv7BYfNuyjdHi7d5OdgdOj9kNF1k85s06weKxc9Zd do871/aweZy9s4PRo2/LKsYAtqgGRpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtz JYW8xNxUWyUXnwBdt8wcoLuUFMoSc0qBQgGJxcVK+naYJoSGuOlawDRG6PqGBMH1GBmggYQ1 jBm3l75nLzizj7Hi8375BsZ/Mxm7GDk5JARMJA5ses8MYYtJXLi3nq2LkYtDSGA6o8T3s8fZ QBJCAhOYJL4uygSx2QTUJZ58WssKYosIGEhMf7KdFaSBWWA+o8Tib4/Yuxg5OIQFIiXW73QH qWERUJVY9OQY2BxeAXeJ3c2PoJYpSZzf+BpsDqeAh8S/G5+ZIXa5S+ybNpV1AiPvAkaGVYyi qQXJBcVJ6bmGesWJucWleel6yfm5mxjBcfZMagfjygaLQ4wCHIxKPLwai6oChVgTy4orcw8x SnAwK4nwKqZWBwrxpiRWVqUW5ccXleakFh9iTAa6aiKzlGhyPjAF5JXEGxqbmJsam1qaWJiY WZImrCTOe6DVOlBIID2xJDU7NbUgtQhmCxMHp1QDoxrXtHMuPyImBl+237UjvjPM7PFPywAu vZntH3caW5tXFXablhfFPN4g4t00o33y15v3jr2M1PoWuVR3w2uD/FMfVR3kTLZeWtK6bvtm 97I7BtVxH76rr1Gb89bg7bRjSXcc329ZVJm73TlxDnviUgu3ye16DD/T85QqzTes/NzUkOr/ 5VyZjhJLcUaioRZzUXEiANdtXPr3AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQnqpe7Mm1E8eSVl8o2s5RUv6Uexq1flg7pqQlaHVpWeCvW4g+fmPqWPgoLext5NOpSTa3Cn X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c02::230 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Amar This patch enables and initialises DWMMC for SMDK5250. Supports both FDT and non-FDT. This patch creates a new file 'exynos5-dt.c' meant for FDT support. exynos5-dt.c: This file shall contain all code which supports FDT. Any addition of FDT support for any module needs to be added in this file. smdk5250.c: This file shall contain the code which supports non-FDT. version. Any addition of non-FDT support for any module needs to be added in this file. May be, the file smdk5250.c can be removed in near future when non-FDT is not required. The Makefile is updated to compile only one of the files exynos5-dt.c / smdk5250.c based on FDT configuration. NOTE: Please note that all additions corresponding to FDT need to be added into the file exynos5-dt.c. At same time if non-FDT support is required then add the corresponding updations into smdk5250.c. Signed-off-by: Amar --- Changes since V1: 1)A new file 'exynos5-dt.c' is created meant for FDT support 2)Makefile is updated to compile only one of the files exynos5-dt.c / smdk5250.c based on FDT configuration Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: No change. Changes since V4: 1)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the function exynos_dwmmc_add_port() in smdk5250.c. 2)dram_init() is updated to use for loop to compute the ram size. 3)dram_init_banksize() is updated to use for loop to initialise the dram bank size. 4)board_uart_init() is updated to use for loop to initialise UARTS. 5)In non-FDT case NULL is passed as parameter to board_i2c_init(). Changes since V5: 1)Enabled CONFIG_LCD only for non-FDT operation. Changes since V6: 1)Re-based. Changes since V7: 1)Re-based. 2)Because of creation of new file 'exynos5-dt.c' meant for FDT support, the exynos_fb.c had to be updated to support non-FDT and FDT for LCD. If exynos_fb.c is not updated as per this patch the compilation fails. 3)Added the macro CONFIG_SUPPORT_EMMC_BOOT in exynos5250-dt.h. Changes since V7: No change. Changes since V8: No change. board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/exynos5-dt.c | 423 ++++++++++++++++++++++++++++++++++++ board/samsung/smdk5250/smdk5250.c | 223 +++++-------------- drivers/video/exynos_fb.c | 4 +- include/configs/exynos5250-dt.h | 8 + 5 files changed, 493 insertions(+), 169 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile index 47c6a5a..ecca9f3 100644 --- a/board/samsung/smdk5250/Makefile +++ b/board/samsung/smdk5250/Makefile @@ -32,8 +32,12 @@ COBJS += tzpc_init.o COBJS += smdk5250_spl.o ifndef CONFIG_SPL_BUILD +ifdef CONFIG_OF_CONTROL +COBJS += exynos5-dt.o +else COBJS += smdk5250.o endif +endif ifdef CONFIG_SPL_BUILD COBJS += spl_boot.o diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c new file mode 100644 index 0000000..78ef424 --- /dev/null +++ b/board/samsung/smdk5250/exynos5-dt.c @@ -0,0 +1,423 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#if defined CONFIG_EXYNOS_TMU +/* + * Boot Time Thermal Analysis for SoC temperature threshold breach + */ +static void boot_temp_check(void) +{ + int temp; + + switch (tmu_monitor(&temp)) { + /* Status TRIPPED ans WARNING means corresponding threshold breach */ + case TMU_STATUS_TRIPPED: + puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); + set_ps_hold_ctrl(); + hang(); + break; + case TMU_STATUS_WARNING: + puts("EXYNOS_TMU: WARNING! Temperature very high\n"); + break; + /* + * TMU_STATUS_INIT means something is wrong with temperature sensing + * and TMU status was changed back from NORMAL to INIT. + */ + case TMU_STATUS_INIT: + default: + debug("EXYNOS_TMU: Unknown TMU state\n"); + } +} +#endif + +#ifdef CONFIG_USB_EHCI_EXYNOS +int board_usb_vbus_init(void) +{ + struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) + samsung_get_base_gpio_part1(); + + /* Enable VBUS power switch */ + s5p_gpio_direction_output(&gpio1->x2, 6, 1); + + /* VBUS turn ON time */ + mdelay(3); + + return 0; +} +#endif + +#ifdef CONFIG_SOUND_MAX98095 +static void board_enable_audio_codec(void) +{ + struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) + samsung_get_base_gpio_part1(); + + /* Enable MAX98095 Codec */ + s5p_gpio_direction_output(&gpio1->x1, 7, 1); + s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); +} +#endif + +int board_init(void) +{ + gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); + +#if defined CONFIG_EXYNOS_TMU + if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { + debug("%s: Failed to init TMU\n", __func__); + return -1; + } + boot_temp_check(); +#endif + +#ifdef CONFIG_EXYNOS_SPI + spi_init(); +#endif +#ifdef CONFIG_USB_EHCI_EXYNOS + board_usb_vbus_init(); +#endif +#ifdef CONFIG_SOUND_MAX98095 + board_enable_audio_codec(); +#endif + return 0; +} + +int dram_init(void) +{ + int i; + u32 addr; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); + gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); + } + return 0; +} + +#if defined(CONFIG_POWER) +static int pmic_reg_update(struct pmic *p, int reg, uint regval) +{ + u32 val; + int ret = 0; + + ret = pmic_reg_read(p, reg, &val); + if (ret) { + debug("%s: PMIC %d register read failed\n", __func__, reg); + return -1; + } + val |= regval; + ret = pmic_reg_write(p, reg, val); + if (ret) { + debug("%s: PMIC %d register write failed\n", __func__, reg); + return -1; + } + return 0; +} + +int power_init_board(void) +{ + struct pmic *p; + + set_ps_hold_ctrl(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + + if (pmic_init(I2C_PMIC)) + return -1; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, + MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) + return -1; + + /* VDD_MIF */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, + MAX77686_BUCK1OUT_1V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK1OUT); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, + MAX77686_BUCK1CTRL_EN)) + return -1; + + /* VDD_ARM */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK2DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, + MAX77686_BUCK2CTRL_ON)) + return -1; + + /* VDD_INT */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK3DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_G3D */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK4DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_LDO2 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, + MAX77686_LD02CTRL1_1_5V | EN_LDO)) + return -1; + + /* VDD_LDO3 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, + MAX77686_LD03CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO5 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, + MAX77686_LD05CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO10 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, + MAX77686_LD10CTRL1_1_8V | EN_LDO)) + return -1; + + return 0; +} +#endif + +void dram_init_banksize(void) +{ + int i; + u32 addr, size; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); + size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); + + gd->bd->bi_dram[i].start = addr; + gd->bd->bi_dram[i].size = size; + } +} + +static int decode_sromc(const void *blob, struct fdt_sromc *config) +{ + int err; + int node; + + node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); + if (node < 0) { + debug("Could not find SROMC node\n"); + return node; + } + + config->bank = fdtdec_get_int(blob, node, "bank", 0); + config->width = fdtdec_get_int(blob, node, "width", 2); + + err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, + FDT_SROM_TIMING_COUNT); + if (err < 0) { + debug("Could not decode SROMC configuration Error: %s\n", + fdt_strerror(err)); + return -FDT_ERR_NOTFOUND; + } + return 0; +} + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_SMC911X + u32 smc_bw_conf, smc_bc_conf; + struct fdt_sromc config; + fdt_addr_t base_addr; + int node; + + node = decode_sromc(gd->fdt_blob, &config); + if (node < 0) { + debug("%s: Could not find sromc configuration\n", __func__); + return 0; + } + node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); + if (node < 0) { + debug("%s: Could not find lan9215 configuration\n", __func__); + return 0; + } + + /* We now have a node, so any problems from now on are errors */ + base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); + if (base_addr == FDT_ADDR_T_NONE) { + debug("%s: Could not find lan9215 address\n", __func__); + return -1; + } + + /* Ethernet needs data bus width of 16 bits */ + if (config.width != 2) { + debug("%s: Unsupported bus width %d\n", __func__, + config.width); + return -1; + } + smc_bw_conf = SROMC_DATA16_WIDTH(config.bank) + | SROMC_BYTE_ENABLE(config.bank); + + smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) | + SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) | + SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) | + SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) | + SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) | + SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) | + SROMC_BC_PMC(config.timing[FDT_SROM_PMC]); + + /* Select and configure the SROMC bank */ + exynos_pinmux_config(PERIPH_ID_SROMC, config.bank); + s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf); + return smc911x_initialize(0, base_addr); +#endif + return 0; +} + +#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{ + const char *board_name; + + board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + if (board_name == NULL) + printf("\nUnknown Board\n"); + else + printf("\nBoard: %s\n", board_name); + + return 0; +} +#endif + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ + int ret; + /* dwmmc initializattion for available channels */ + ret = exynos_dwmmc_init(gd->fdt_blob); + if (ret) + debug("dwmmc init failed\n"); + + return ret; +} +#endif + +static int board_uart_init(void) +{ + int err, uart_id, ret = 0; + + for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { + err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); + if (err) { + debug("UART%d not configured\n", + (uart_id - PERIPH_ID_UART0)); + ret |= err; + } + } + return ret; +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ + int err; + err = board_uart_init(); + if (err) { + debug("UART init failed\n"); + return err; + } +#ifdef CONFIG_SYS_I2C_INIT_BOARD + board_i2c_init(gd->fdt_blob); +#endif + return err; +} +#endif + +#ifdef CONFIG_LCD +void exynos_cfg_lcd_gpio(void) +{ + struct exynos5_gpio_part1 *gpio1 = + (struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1(); + + /* For Backlight */ + s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT); + s5p_gpio_set_value(&gpio1->b2, 0, 1); + + /* LCD power on */ + s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT); + s5p_gpio_set_value(&gpio1->x1, 5, 1); + + /* Set Hotplug detect for DP */ + s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3)); +} + +void exynos_set_dp_phy(unsigned int onoff) +{ + set_dp_phy_ctrl(onoff); +} +#endif diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 8b09e1d..276fd41 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -37,39 +38,9 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; -#if defined CONFIG_EXYNOS_TMU -/* - * Boot Time Thermal Analysis for SoC temperature threshold breach - */ -static void boot_temp_check(void) -{ - int temp; - - switch (tmu_monitor(&temp)) { - /* Status TRIPPED ans WARNING means corresponding threshold breach */ - case TMU_STATUS_TRIPPED: - puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); - set_ps_hold_ctrl(); - hang(); - break; - case TMU_STATUS_WARNING: - puts("EXYNOS_TMU: WARNING! Temperature very high\n"); - break; - /* - * TMU_STATUS_INIT means something is wrong with temperature sensing - * and TMU status was changed back from NORMAL to INIT. - */ - case TMU_STATUS_INIT: - default: - debug("EXYNOS_TMU: Unknown TMU state\n"); - } -} -#endif - #ifdef CONFIG_USB_EHCI_EXYNOS int board_usb_vbus_init(void) { @@ -102,14 +73,6 @@ int board_init(void) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); -#if defined CONFIG_EXYNOS_TMU - if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { - debug("%s: Failed to init TMU\n", __func__); - return -1; - } - boot_temp_check(); -#endif - #ifdef CONFIG_EXYNOS_SPI spi_init(); #endif @@ -124,14 +87,13 @@ int board_init(void) int dram_init(void) { - gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) - + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) - + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) - + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE) - + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE) - + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE) - + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE) - + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE); + int i; + u32 addr; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); + gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); + } return 0; } @@ -254,57 +216,15 @@ int power_init_board(void) void dram_init_banksize(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, - PHYS_SDRAM_1_SIZE); - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, - PHYS_SDRAM_2_SIZE); - gd->bd->bi_dram[2].start = PHYS_SDRAM_3; - gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, - PHYS_SDRAM_3_SIZE); - gd->bd->bi_dram[3].start = PHYS_SDRAM_4; - gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, - PHYS_SDRAM_4_SIZE); - gd->bd->bi_dram[4].start = PHYS_SDRAM_5; - gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5, - PHYS_SDRAM_5_SIZE); - gd->bd->bi_dram[5].start = PHYS_SDRAM_6; - gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6, - PHYS_SDRAM_6_SIZE); - gd->bd->bi_dram[6].start = PHYS_SDRAM_7; - gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7, - PHYS_SDRAM_7_SIZE); - gd->bd->bi_dram[7].start = PHYS_SDRAM_8; - gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8, - PHYS_SDRAM_8_SIZE); -} - -#ifdef CONFIG_OF_CONTROL -static int decode_sromc(const void *blob, struct fdt_sromc *config) -{ - int err; - int node; - - node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); - if (node < 0) { - debug("Could not find SROMC node\n"); - return node; - } - - config->bank = fdtdec_get_int(blob, node, "bank", 0); - config->width = fdtdec_get_int(blob, node, "width", 2); - - err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, - FDT_SROM_TIMING_COUNT); - if (err < 0) { - debug("Could not decode SROMC configuration\n"); - return -FDT_ERR_NOTFOUND; + int i; + u32 addr, size; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); + size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); + gd->bd->bi_dram[i].start = addr; + gd->bd->bi_dram[i].size = size; } - - return 0; } -#endif int board_eth_init(bd_t *bis) { @@ -313,27 +233,6 @@ int board_eth_init(bd_t *bis) struct fdt_sromc config; fdt_addr_t base_addr; -#ifdef CONFIG_OF_CONTROL - int node; - - node = decode_sromc(gd->fdt_blob, &config); - if (node < 0) { - debug("%s: Could not find sromc configuration\n", __func__); - return 0; - } - node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); - if (node < 0) { - debug("%s: Could not find lan9215 configuration\n", __func__); - return 0; - } - - /* We now have a node, so any problems from now on are errors */ - base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); - if (base_addr == FDT_ADDR_T_NONE) { - debug("%s: Could not find lan9215 address\n", __func__); - return -1; - } -#else /* Non-FDT configuration - bank number and timing parameters*/ config.bank = CONFIG_ENV_SROM_BANK; config.width = 2; @@ -346,7 +245,6 @@ int board_eth_init(bd_t *bis) config.timing[FDT_SROM_TACP] = 0x09; config.timing[FDT_SROM_PMC] = 0x01; base_addr = CONFIG_SMC911X_BASE; -#endif /* Ethernet needs data bus width of 16 bits */ if (config.width != 2) { @@ -376,17 +274,7 @@ int board_eth_init(bd_t *bis) #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard(void) { -#ifdef CONFIG_OF_CONTROL - const char *board_name; - - board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL); - if (board_name == NULL) - printf("\nUnknown Board\n"); - else - printf("\nBoard: %s\n", board_name); -#else printf("\nBoard: SMDK5250\n"); -#endif return 0; } #endif @@ -394,48 +282,54 @@ int checkboard(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - int err; + int err, ret = 0, index, bus_width; + u32 base; err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); - if (err) { + if (err) debug("SDMMC0 not configured\n"); - return err; - } - - err = s5p_mmc_init(0, 8); - return err; + ret |= err; + + /*EMMC: dwmmc Channel-0 with 8 bit bus width */ + index = 0; + base = samsung_get_base_mmc() + (0x10000 * index); + bus_width = 8; + err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL); + if (err) + debug("dwmmc Channel-0 init failed\n"); + ret |= err; + + err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE); + if (err) + debug("SDMMC2 not configured\n"); + ret |= err; + + /*SD: dwmmc Channel-2 with 4 bit bus width */ + index = 2; + base = samsung_get_base_mmc() + (0x10000 * index); + bus_width = 4; + err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL); + if (err) + debug("dwmmc Channel-2 init failed\n"); + ret |= err; + + return ret; } #endif static int board_uart_init(void) { - int err; - - err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE); - if (err) { - debug("UART0 not configured\n"); - return err; + int err, uart_id, ret = 0; + + for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { + err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); + if (err) { + debug("UART%d not configured\n", + (uart_id - PERIPH_ID_UART0)); + ret |= err; + } } - - err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE); - if (err) { - debug("UART1 not configured\n"); - return err; - } - - err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE); - if (err) { - debug("UART2 not configured\n"); - return err; - } - - err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); - if (err) { - debug("UART3 not configured\n"); - return err; - } - - return 0; + return ret; } #ifdef CONFIG_BOARD_EARLY_INIT_F @@ -448,7 +342,7 @@ int board_early_init_f(void) return err; } #ifdef CONFIG_SYS_I2C_INIT_BOARD - board_i2c_init(gd->fdt_blob); + board_i2c_init(NULL); #endif return err; } @@ -477,7 +371,6 @@ void exynos_set_dp_phy(unsigned int onoff) set_dp_phy_ctrl(onoff); } -#ifndef CONFIG_OF_CONTROL vidinfo_t panel_info = { .vl_freq = 60, .vl_col = 2560, @@ -543,13 +436,9 @@ static struct exynos_dp_platform_data dp_platform_data = { .edp_dev_info = &edp_info, }; -#endif void init_panel_info(vidinfo_t *vid) { -#ifndef CONFIG_OF_CONTROL - vid->rgb_mode = MODE_RGB_P, - + vid->rgb_mode = MODE_RGB_P; exynos_set_dp_platform_data(&dp_platform_data); -#endif } #endif diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c index dfe329f..d3bb7f4 100644 --- a/drivers/video/exynos_fb.c +++ b/drivers/video/exynos_fb.c @@ -331,10 +331,10 @@ void lcd_ctrl_init(void *lcdbase) #ifdef CONFIG_OF_CONTROL if (exynos_fimd_parse_dt(gd->fdt_blob)) debug("Can't get proper panel info\n"); -#endif +#else /* initialize parameters which is specific to panel. */ init_panel_info(&panel_info); - +#endif panel_width = panel_info.vl_width; panel_height = panel_info.vl_height; diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 496a194..e026362 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -100,6 +100,10 @@ #define CONFIG_MMC #define CONFIG_SDHCI #define CONFIG_S5P_SDHCI +#define CONFIG_DWMMC +#define CONFIG_EXYNOS_DWMMC +#define CONFIG_SUPPORT_EMMC_BOOT + #define CONFIG_BOARD_EARLY_INIT_F @@ -220,6 +224,10 @@ #define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) #define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_PART +#define CONFIG_PARTITION_UUIDS + #define CONFIG_IRAM_STACK 0x02050000