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[203.254.224.24]) by mx.google.com with ESMTP id qp8si27055243pbc.33.2013.03.05.04.57.37; Tue, 05 Mar 2013 04:57:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of amarendra.xt@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of amarendra.xt@samsung.com designates 203.254.224.24 as permitted sender) smtp.mail=amarendra.xt@samsung.com Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MJ6002SYUO1FT00@mailout1.samsung.com>; Tue, 05 Mar 2013 21:57:37 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id A5.6C.23273.0CBE5315; Tue, 05 Mar 2013 21:57:37 +0900 (KST) X-AuditID: cbfee691-b7faa6d000005ae9-97-5135ebc0db6c Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id CA.D1.03880.0CBE5315; Tue, 05 Mar 2013 21:57:36 +0900 (KST) Received: from chrome-ubuntu.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MJ600GDUUCXH840@mmp1.samsung.com>; Tue, 05 Mar 2013 21:57:36 +0900 (KST) From: Amar To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, afleming@gmail.com, jh80.chung@samsung.com Subject: [PATCH V7 08/10] SMDK5250: Enable EMMC booting Date: Tue, 05 Mar 2013 08:11:28 -0500 Message-id: <1362489090-7745-9-git-send-email-amarendra.xt@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1362489090-7745-1-git-send-email-amarendra.xt@samsung.com> References: <1362489090-7745-1-git-send-email-amarendra.xt@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNLMWRmVeSWpSXmKPExsWyRsSkTvfga9NAg66fbBYP199ksZhy+AuL A5PHnWt72AIYo7hsUlJzMstSi/TtErgyjq+9wl6wWLviSvdh1gbGL8pdjJwcEgImEl/fLmaE sMUkLtxbz9bFyMUhJLCUUeLF26NMMEXnrvQzQyQWMUos2vAKqqqXSeJ170+WLkYODjYBVYlf i+1BGkQEJCR+9V9lBKlhFuhglNgxcTPYCmEBc4nmjyfAbBag+s72VnYQm1fAXeLYjYdQ2+Qk Pux5BBbnFPCQWPR5ITOILQRUc6lnEQvIUAmB+2wSF2YfY4IYJCDxbfIhsCMkBGQlNh1ghpgj KXFwxQ2WCYzCCxgZVjGKphYkFxQnpReZ6hUn5haX5qXrJefnbmIEBuTpf88m7mC8f8D6EGMy 0LiJzFKiyfnAgM4riTc0NjE3NTY1M7K0tDQlTVhJnFf+kkygkEB6YklqdmpqQWpRfFFpTmrx IUYmDk6pBsZ5nI6uzybNYA9QYngVmPL0cMJbyVen+t7NN3L6umPnOe6M1r85072NszZ/K056 UeVVufRTf+2ev1M2sbWsu2G2JPPf7qK8ucmqqm1zryyfb2e75AuTd+/xJW//V888NHlm5mVT nQL9UO1i4//M61t8+xT7vvoI/H/YdeH8vxydJ3On60vOKNqixFKckWioxVxUnAgATVAhgV4C AAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrBIsWRmVeSWpSXmKPExsVy+t9jAd0Dr00DDZ6cNrB4uP4mi8WUw19Y HJg87lzbwxbAGNXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtqq+Ti E6DrlpkDNFtJoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEaSFjDmHF87RX2gsXa FVe6D7M2MH5R7mLk5JAQMJE4d6WfGcIWk7hwbz1bFyMXh5DAIkaJRRteQTm9TBKve3+ydDFy cLAJqEr8WmwP0iAiICHxq/8qI0gNs0AHo8SOiZsZQRLCAuYSzR9PgNksQPWd7a3sIDavgLvE sRsPmSC2yUl82PMILM4p4CGx6PNCsCuEgGou9SximcDIu4CRYRWjaGpBckFxUnqukV5xYm5x aV66XnJ+7iZGcLg/k97BuKrB4hCjAAejEg8vw1GTQCHWxLLiytxDjBIczEoivDufmgYK8aYk VlalFuXHF5XmpBYfYkwGumois5Rocj4wFvNK4g2NTcxNjU0tTSxMzCxJE1YS52U89SRASCA9 sSQ1OzW1ILUIZgsTB6dUA+PMXZd+LGOZeOrX0scaQRvflmyt/XHq793iT5oR9syXjzKKXFhi uPnwl72bgvLvZezuPibBF1Rrx3R6A7PZk+8yiuckPOatT/6nd2T13LbNHs4L7r50duE7/p4n SOOagJnDRCHmqc0fjvrMObn0Fv+FX4fSlm55uuhoSvreUxN/HE3jOzdLqtlSVImlOCPRUIu5 qDgRAH+EYty7AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQmAn8y5jEVneHxOUbN6IZYFD6NXpNEW6DHJMBVvHOESeJBCn0pLS+2ty1D3pPOXu//a8rUc This patch adds support for EMMC booting on SMDK5250. Signed-off-by: Amar Acked-by: Simon Glass --- Changes since V1: 1)Updated spl_boot.c file to maintain irom pointer table instead of using the #define values defined in header file. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: No change. Changes since V4: 1)The function get_irom_func(int index) has been added to avoid type casting at many places. 2)The changes to file arch/arm/include/asm/arch-exynos/clk.h are included in this patch file. Changes since V5: No change. Changes since V6: No change. arch/arm/include/asm/arch-exynos/clk.h | 3 ++ board/samsung/smdk5250/clock_init.c | 15 ++++++++++ board/samsung/smdk5250/clock_init.h | 5 ++++ board/samsung/smdk5250/spl_boot.c | 52 ++++++++++++++++++++++++++++++---- 4 files changed, 69 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h index 1935b0b..a4d5b4e 100644 --- a/arch/arm/include/asm/arch-exynos/clk.h +++ b/arch/arm/include/asm/arch-exynos/clk.h @@ -29,6 +29,9 @@ #define VPLL 4 #define BPLL 5 +#define FSYS1_MMC0_DIV_MASK 0xff0f +#define FSYS1_MMC0_DIV_VAL 0x0701 + unsigned long get_pll_clk(int pllreg); unsigned long get_arm_clk(void); unsigned long get_i2c_clk(void); diff --git a/board/samsung/smdk5250/clock_init.c b/board/samsung/smdk5250/clock_init.c index c009ae5..154993c 100644 --- a/board/samsung/smdk5250/clock_init.c +++ b/board/samsung/smdk5250/clock_init.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "clock_init.h" #include "setup.h" @@ -664,3 +665,17 @@ void clock_init_dp_clock(void) /* We run DP at 267 Mhz */ setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1); } + +/* + * Set clock divisor value for booting from EMMC. + * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz. + */ +void emmc_boot_clk_div_set(void) +{ + struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE; + unsigned int div_mmc; + + div_mmc = readl((unsigned int) &clk->div_fsys1) & ~FSYS1_MMC0_DIV_MASK; + div_mmc |= FSYS1_MMC0_DIV_VAL; + writel(div_mmc, (unsigned int) &clk->div_fsys1); +} diff --git a/board/samsung/smdk5250/clock_init.h b/board/samsung/smdk5250/clock_init.h index f751bcb..20a1d47 100644 --- a/board/samsung/smdk5250/clock_init.h +++ b/board/samsung/smdk5250/clock_init.h @@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void); * Initialize clock for the device */ void system_clock_init(void); + +/* + * Set clock divisor value for booting from EMMC. + */ +void emmc_boot_clk_div_set(void); #endif diff --git a/board/samsung/smdk5250/spl_boot.c b/board/samsung/smdk5250/spl_boot.c index d8f3c1e..4ddbd4a 100644 --- a/board/samsung/smdk5250/spl_boot.c +++ b/board/samsung/smdk5250/spl_boot.c @@ -23,15 +23,42 @@ #include #include +#include +#include +#include + +#include "clock_init.h" + +/* Index into irom ptr table */ +enum index { + MMC_INDEX, + EMMC44_INDEX, + EMMC44_END_INDEX, + SPI_INDEX, +}; + +/* IROM Function Pointers Table */ +u32 irom_ptr_table[] = { + [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */ + [EMMC44_INDEX] = 0x02020044, /* iROM Function Pointer-EMMC4.4 boot*/ + [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer + -EMMC4.4 end boot operation */ + [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */ + }; + enum boot_mode { BOOT_MODE_MMC = 4, BOOT_MODE_SERIAL = 20, + BOOT_MODE_EMMC = 8, /* EMMC4.4 */ /* Boot based on Operating Mode pin settings */ BOOT_MODE_OM = 32, BOOT_MODE_USB, /* Boot using USB download */ }; - typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst); +void *get_irom_func(int index) +{ + return (void *) *(u32 *)irom_ptr_table[index]; +} /* * Copy U-boot from mmc to RAM: @@ -40,23 +67,36 @@ enum boot_mode { */ void copy_uboot_to_ram(void) { - spi_copy_func_t spi_copy; enum boot_mode bootmode; - u32 (*copy_bl2)(u32, u32, u32); - + u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst); + u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst); + u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst); + void (*end_bootop_from_emmc)(void); + /* read Operation Mode ststus register to find the bootmode */ bootmode = readl(EXYNOS5_POWER_BASE) & OM_STAT; switch (bootmode) { case BOOT_MODE_SERIAL: - spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR; + spi_copy = get_irom_func(SPI_INDEX); spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE, CONFIG_SYS_TEXT_BASE); break; case BOOT_MODE_MMC: - copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR; + copy_bl2 = get_irom_func(MMC_INDEX); copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE); break; + case BOOT_MODE_EMMC: + /* Set the FSYS1 clock divisor value for EMMC boot */ + emmc_boot_clk_div_set(); + + copy_bl2_from_emmc = get_irom_func(EMMC44_INDEX); + end_bootop_from_emmc = get_irom_func(EMMC44_END_INDEX); + + copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE); + end_bootop_from_emmc(); + break; + default: break; }