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[203.254.224.25]) by mx.google.com with ESMTP id ab9si20081499icc.55.2013.02.07.03.56.15; Thu, 07 Feb 2013 03:56:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.25 as permitted sender) client-ip=203.254.224.25; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.25 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MHU00FF5MHNTO00@mailout2.samsung.com>; Thu, 07 Feb 2013 20:56:14 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id B5.D6.03880.E5693115; Thu, 07 Feb 2013 20:56:14 +0900 (KST) X-AuditID: cbfee61b-b7fb06d000000f28-a9-5113965e1992 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 65.D6.03880.E5693115; Thu, 07 Feb 2013 20:56:14 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MHU00EZ7MC09A40@mmp1.samsung.com>; Thu, 07 Feb 2013 20:56:14 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH 4/4 V3] EXYNOS5: GPIO: Enable GPIO Command for EXYNOS5 Date: Thu, 07 Feb 2013 17:30:30 +0530 Message-id: <1360238430-27715-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1360238430-27715-1-git-send-email-rajeshwari.s@samsung.com> References: <1360238430-27715-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrOLMWRmVeSWpSXmKPExsWyRsSkTjdumnCgwa9fhhYP199ksZhy+AuL A5PHnWt72AIYo7hsUlJzMstSi/TtErgyNrQvZS5YJVHxZ2FkA+MO4S5GTg4JAROJeQc2s0DY YhIX7q1n62Lk4hASWMoocX9ZHwtM0fs3Z1khEosYJT7vmMMO4UxkknizdBNYFZuAkcTWk9MY QWwRAQmJX/1XwWxmgRiJ1/t/sIHYwgJuEpMeQqxjEVCVeH9/NVicV8BD4lZPAxvENgWJY1O/ Am3j4OAU8JRo+KcLEhYCKmm6+IsRZK+EwG02iZ8Lm5kg5ghIfJt8iAWkXkJAVmLTAWaIMZIS B1fcYJnAKLyAkWEVo2hqQXJBcVJ6rpFecWJucWleul5yfu4mRmAwnv73THoH46oGi0OMAhyM Sjy8N5cKBQqxJpYVV+YeYpTgYFYS4T1ZIxwoxJuSWFmVWpQfX1Sak1p8iDEZaPlEZinR5Hxg pOSVxBsam5ibGptaGhmZmZqSJqwkzst46kmAkEB6YklqdmpqQWoRzBYmDk6pBsaYApa2719n OlWeZopL+bli2l6bakuZbapS/mXXTbwS4svcrsUHTfN0O6TV63N10jeN7ZOdeI23mmxXPHRO 8/e8t7/EFV1ZTu3cIzJ3u9R7NZ8J/CcVVCY37/U1K5auq//dNEnpsJq/npgjr/sk65dc/Cuf TS+LUni77aBP45XI1Am/hF9tzFRiKc5INNRiLipOBABilFooigIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGIsWRmVeSWpSXmKPExsVy+t9jAd24acKBBk8aVCwerr/JYjHl8BcW ByaPO9f2sAUwRjUw2mSkJqakFimk5iXnp2TmpdsqeQfHO8ebmhkY6hpaWpgrKeQl5qbaKrn4 BOi6ZeYAzVZSKEvMKQUKBSQWFyvp22GaEBripmsB0xih6xsSBNdjZIAGEtYwZmxoX8pcsEqi 4s/CyAbGHcJdjJwcEgImEu/fnGWFsMUkLtxbz9bFyMUhJLCIUeLzjjnsEM5EJok3SzexgFSx CRhJbD05jRHEFhGQkPjVfxXMZhaIkXi9/wcbiC0s4CYx6eFmsHoWAVWJ9/dXg8V5BTwkbvU0 sEFsU5A4NvUr0GYODk4BT4mGf7ogYSGgkqaLvxgnMPIuYGRYxSiaWpBcUJyUnmukV5yYW1ya l66XnJ+7iREc6s+kdzCuarA4xCjAwajEw3tzqVCgEGtiWXFl7iFGCQ5mJRHekzXCgUK8KYmV ValF+fFFpTmpxYcYk4GOmsgsJZqcD4zDvJJ4Q2MTc1NjU0sTCxMzS9KElcR5GU89CRASSE8s Sc1OTS1ILYLZwsTBKdXAqCnn+z9P+jOz89cpjVOst5xsXrb37NnQoj4jkRqlj6kvNu0TYBf1 +na0r1P87fUFhkdPzvzYb8AX+vef6E5W/4aeNW2XFfi7DcuOJd0w3T7LY6OscsZdgZeZ5oUs s5I3b5M7Oyvs1PmI8ou2nz3OSTJc+vSsT591H597/MaUznN7p00IU77zSImlOCPRUIu5qDgR AC4qKjC5AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQmgqvdLpyWnNmsG22fgKjt6v8EknlaR1zKh8GN0aJLoUTz1lY8pXFE5/GLyz0OKp3ofb0Nz This patch enables GPIO Command for EXYNOS5. Function has been added to asm/gpio.h to decode the input gpio name to gpio number. example: gpio set gpa00 Signed-off-by: Rajeshwari Shinde --- Changes in V2: - New patch Changes in V3: - Created a table to know the base address of input bank. arch/arm/cpu/armv7/exynos/pinmux.c | 50 +++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/gpio.h | 8 +++++ include/configs/exynos5250-dt.h | 1 + 3 files changed, 59 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 28b0306..a01ce0c 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -27,6 +27,21 @@ #include #include +struct gpio_name_num_table exynos5_gpio_table[] = { + { 'a', GPIO_A00 }, + { 'b', GPIO_B00 }, + { 'c', GPIO_C00 }, + { 'd', GPIO_D00 }, + { 'y', GPIO_Y00 }, + { 'x', GPIO_X00 }, + { 'e', GPIO_E00 }, + { 'f', GPIO_F00 }, + { 'g', GPIO_G00 }, + { 'h', GPIO_H00 }, + { 'v', GPIO_V00 }, + { 'z', GPIO_Z0 }, +}; + static void exynos5_uart_config(int peripheral) { int i, start, count; @@ -448,3 +463,38 @@ int pinmux_decode_periph_id(const void *blob, int node) return PERIPH_ID_NONE; } #endif + +int name_to_gpio(const char *name) +{ + unsigned int num, i; + + name++; + + if (*name == 'p') + ++name; + + for (i = 0; i < ARRAY_SIZE(exynos5_gpio_table); i++) { + if (*name == exynos5_gpio_table[i].bank) { + if (*name == 'c') { + name++; + num = simple_strtoul(name, NULL, 10); + if (num >= 40) { + num = GPIO_C40 + (num - 40); + } else { + num = simple_strtoul(name, NULL, 8); + num = exynos5_gpio_table[i].base + num; + } + } else { + name++; + num = simple_strtoul(name, NULL, 8); + num = exynos5_gpio_table[i].base + num; + } + break; + } + } + + if (i == ARRAY_SIZE(exynos5_gpio_table)) + return -1; + + return num; +} diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index 38b959d..016a112 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -657,6 +657,14 @@ static inline unsigned int s5p_gpio_part_max(int nr) void gpio_cfg_pin(int gpio, int cfg); void gpio_set_pull(int gpio, int mode); void gpio_set_drv(int gpio, int mode); + +struct gpio_name_num_table { + char bank; + unsigned int base; +}; + +int name_to_gpio(const char *name); +#define name_to_gpio(n) name_to_gpio(n) #endif /* Pin configurations */ diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index b1b24a9..a32cc3e 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -113,6 +113,7 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_NET +#define CONFIG_CMD_GPIO #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK