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[203.254.224.33]) by mx.google.com with ESMTP id rg4si27976898pbc.353.2012.12.26.21.56.50; Wed, 26 Dec 2012 21:56:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MFO006YMDRMKSN0@mailout3.samsung.com>; Thu, 27 Dec 2012 14:56:43 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 8D.C7.01231.B13EBD05; Thu, 27 Dec 2012 14:56:43 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-c0-50dbe31baf03 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id EC.C7.01231.B13EBD05; Thu, 27 Dec 2012 14:56:43 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MFO009UDDU79J90@mmp1.samsung.com>; Thu, 27 Dec 2012 14:56:43 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH 04/16 V2] EXYNOS5: FDT : Decode peripheral id Date: Thu, 27 Dec 2012 11:33:11 +0530 Message-id: <1356588203-24838-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1356588203-24838-1-git-send-email-rajeshwari.s@samsung.com> References: <1356588203-24838-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsWyRsSkTlf68e0Ag+ktChYP199ksZhy+AuL A5PHnWt72AIYo7hsUlJzMstSi/TtErgyvr6rLTguW7H51gumBsbdEl2MnBwSAiYSr3r3MEPY YhIX7q1n62Lk4hASWMooce5ZPxNM0b7/H1ghEosYJeYcmgeWEBKYyCQxtzEVxGYTMJLYenIa I4gtIiAh8av/KpjNLBAj8Xr/DzYQW1jAVuLzwUNg21gEVCVevdzKDmLzCnhI3PrVxwaxTEHi 2NSvrCA2p4CnxIQryxghdnlIfNlzng2iV0Di2+RDLF2MHED1shKbDjCD3CYhcJtNonnZWkaI OZISB1fcYJnAKLyAkWEVo2hqQXJBcVJ6rqFecWJucWleul5yfu4mRmAwnv73TGoH48oGi0OM AhyMSjy8ita3A4RYE8uKK3MPMUpwMCuJ8E7fDBTiTUmsrEotyo8vKs1JLT7E6AN0yURmKdHk fGCk5JXEGxqbmJsam1oaGZmZmuIQVhLnbfZICRASSE8sSc1OTS1ILYIZx8TBKdXAmM6XOcv2 d9P++ro7nBtFrzE8XLLWXfbjyiqDsww7c1zWpmwIe8S5NUttw+85e/95Wp/WW7Z3wbSjC6Te 7HpgFPwofpnxJF4v61r5FVqV1S4O+++6dP7qYz3s/YGp4uxEscVX2+wVT/SFz1z1qOijbcm/ k1rnoiYlVU9TX3bo6c6qdu61rlyTbJVYijMSDbWYi4oTAWjaaCtzAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42I5/e+xgK7049sBBrvvClk8XH+TxWLK4S8s Dkwed67tYQtgjGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLx CdB1y8wBmq2kUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7HyAANJKxhzPj6rrbguGzF 5lsvmBoYd0t0MXJySAiYSOz7/4EVwhaTuHBvPVsXIxeHkMAiRok5h+YxgSSEBCYyScxtTAWx 2QSMJLaenMYIYosISEj86r8KZjMLxEi83v+DDcQWFrCV+HzwEDOIzSKgKvHq5VZ2EJtXwEPi 1q8+NohlChLHpn4FW8wp4Ckx4coyRohdHhJf9pxnm8DIu4CRYRWjaGpBckFxUnquoV5xYm5x aV66XnJ+7iZGcKg/k9rBuLLB4hCjAAejEg+vovXtACHWxLLiytxDjBIczEoivNM3A4V4UxIr q1KL8uOLSnNSiw8x+gBdNZFZSjQ5HxiHeSXxhsYm5qbGppYmFiZmljiElcR5mz1SAoQE0hNL UrNTUwtSi2DGMXFwSjUwru14fl+S5V1Cm/o/7sCFH+/5p8q6qyz7zWL+eQ97Z7acx9vD99Z9 OJj2mEWhb1/F3oowDvPEnL2G9YfKdZSlRdQOT31wuGLld+7fN1cstzzoa3xg7YHOxCCfpL0s gY8idjn/9jae9YLd5ULY/p6VGr8i4wVmFvG2Vi/3PvLP9k6X8Y/4mFIWJZbijERDLeai4kQA yuFCY6ICAAA= X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQlkKCQ38IEddKi0HQuc4nhmOk7zWBtSERh4gxkcKGrqu9dlsSKPa2u276TEffMKWrafPqA8 Api is added to decode peripheral id based on the interrupt number of the peripheral. Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes since V1: - Removed hardcoded numbers. arch/arm/cpu/armv7/exynos/pinmux.c | 29 +++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/periph.h | 33 +++++++++++++++++----------- arch/arm/include/asm/arch-exynos/pinmux.h | 8 +++++++ 3 files changed, 57 insertions(+), 13 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 20a4b84..40f83b5 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -22,6 +22,7 @@ */ #include +#include #include #include #include @@ -402,3 +403,31 @@ int exynos_pinmux_config(int peripheral, int flags) return -1; } } + +#ifdef CONFIG_OF_CONTROL +static int exynos5_pinmux_decode_periph_id(const void *blob, int node) +{ + int err; + u32 cell[3]; + + err = fdtdec_get_int_array(blob, node, "interrupts", cell, + ARRAY_SIZE(cell)); + if (err) + return PERIPH_ID_NONE; + + /* check for invalid peripheral id */ + if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0)) + return cell[1]; + + debug(" invalid peripheral id\n"); + return PERIPH_ID_NONE; +} + +int pinmux_decode_periph_id(const void *blob, int node) +{ + if (cpu_is_exynos5()) + return exynos5_pinmux_decode_periph_id(blob, node); + else + return PERIPH_ID_NONE; +} +#endif diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h index 13abd2d..89bcdfc 100644 --- a/arch/arm/include/asm/arch-exynos/periph.h +++ b/arch/arm/include/asm/arch-exynos/periph.h @@ -25,12 +25,17 @@ #define __ASM_ARM_ARCH_PERIPH_H /* - * Peripherals requiring clock/pinmux configuration. List will + * Peripherals required for pinmux configuration. List will * grow with support for more devices getting added. + * Numbering based on interrupt table. * */ enum periph_id { - PERIPH_ID_I2C0, + PERIPH_ID_UART0 = 51, + PERIPH_ID_UART1, + PERIPH_ID_UART2, + PERIPH_ID_UART3, + PERIPH_ID_I2C0 = 56, PERIPH_ID_I2C1, PERIPH_ID_I2C2, PERIPH_ID_I2C3, @@ -38,22 +43,24 @@ enum periph_id { PERIPH_ID_I2C5, PERIPH_ID_I2C6, PERIPH_ID_I2C7, - PERIPH_ID_I2S1, - PERIPH_ID_SDMMC0, + PERIPH_ID_SPI0 = 68, + PERIPH_ID_SPI1, + PERIPH_ID_SPI2, + PERIPH_ID_SDMMC0 = 75, PERIPH_ID_SDMMC1, PERIPH_ID_SDMMC2, PERIPH_ID_SDMMC3, - PERIPH_ID_SDMMC4, - PERIPH_ID_SROMC, - PERIPH_ID_SPI0, - PERIPH_ID_SPI1, - PERIPH_ID_SPI2, + PERIPH_ID_I2S1 = 99, + + /* Since following peripherals do + * not have shared peripheral interrupts (SPIs) + * they are numbered arbitiraly after the maximum + * SPIs Exynos has (128) + */ + PERIPH_ID_SROMC = 128, PERIPH_ID_SPI3, PERIPH_ID_SPI4, - PERIPH_ID_UART0, - PERIPH_ID_UART1, - PERIPH_ID_UART2, - PERIPH_ID_UART3, + PERIPH_ID_SDMMC4, PERIPH_ID_COUNT, PERIPH_ID_NONE = -1, diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h b/arch/arm/include/asm/arch-exynos/pinmux.h index 10ea736..014eebc 100644 --- a/arch/arm/include/asm/arch-exynos/pinmux.h +++ b/arch/arm/include/asm/arch-exynos/pinmux.h @@ -55,4 +55,12 @@ enum { */ int exynos_pinmux_config(int peripheral, int flags); +/** + * Decode the peripheral id using the interrpt numbers. + * + * @param blob Device tree blob + * @param node FDT I2C node to find + * @return peripheral id if ok, PERIPH_ID_NONE on error + */ +int pinmux_decode_periph_id(const void *blob, int node); #endif