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[203.254.224.24]) by mx.google.com with ESMTP id np6si1647816pbc.59.2012.11.28.23.03.37; Wed, 28 Nov 2012 23:03:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.24 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0ME800GM4M9TFPQ0@mailout1.samsung.com>; Thu, 29 Nov 2012 16:03:36 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.125]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 10.44.12699.8C807B05; Thu, 29 Nov 2012 16:03:36 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-f0-50b708c8b226 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 8F.34.12699.7C807B05; Thu, 29 Nov 2012 16:03:35 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0ME800LB8M9M7580@mmp1.samsung.com>; Thu, 29 Nov 2012 16:03:35 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, hs@denx.de Subject: [PATCH 4/6 V4] EXYNOS5: FDT : Decode peripheral id Date: Thu, 29 Nov 2012 12:39:49 +0530 Message-id: <1354172991-1005-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1354172991-1005-1-git-send-email-rajeshwari.s@samsung.com> References: <1354172991-1005-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsWyRsSkVvcEx/YAg1OTeCwerr/JYjHl8BcW ByaPO9f2sAUwRnHZpKTmZJalFunbJXBlfNrTzFRwSrZi78OHrA2MOyW6GDk5JARMJCafPMgE YYtJXLi3nq2LkYtDSGApo8TBn2dZYYpetB9lhkgsYpToO/4ZrENIYCKTxOUeLhCbTcBIYuvJ aYwgtoiAhMSv/qtgNrNAhsTtD0tYQGxhAWuJd09esoHYLAKqEldf7ARbwCvgLnFzSTsLxDIF iWNTv4LFOQU8JM40fGOD2OUuMe3OdUaIXgGJb5MPAdVzANXLSmw6wAzReptN4schqJslJQ6u uMEygVF4ASPDKkbR1ILkguKk9FwjveLE3OLSvHS95PzcTYzAYDz975n0DsZVDRaHGAU4GJV4 eDdabgsQYk0sK67MPcQowcGsJMKr+QcoxJuSWFmVWpQfX1Sak1p8iNEH6JCJzFKiyfnASMkr iTc0NjE3NTa1NDIyMzXFIawkztvskRIgJJCeWJKanZpakFoEM46Jg1OqgXGBb4j5Lf30htJN 04uW221X9bt4YJ0Gr5at0bHFEetuhnO/bXNfu/CZxOaCmARW9aqkkt6zCQrzd7wJ2jax7UkS M1vcwzmbN95lup6W++vEujkZFabv7LuUy3OTdsnaTLsclKXslfahY3L8qeudDj8zL763e202 maW+cVugq9yndxl3nsXeXqTEUpyRaKjFXFScCAA+5aPocwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsVy+t9jAd3jHNsDDD6fsbB4uP4mi8WUw19Y HJg87lzbwxbAGNXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtqq+Ti E6DrlpkDNFtJoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEaSFjDmPFpTzNTwSnZ ir0PH7I2MO6U6GLk5JAQMJF40X6UGcIWk7hwbz1bFyMXh5DAIkaJvuOfmUASQgITmSQu93CB 2GwCRhJbT05jBLFFBCQkfvVfBbOZBTIkbn9YwgJiCwtYS7x78pINxGYRUJW4+mInK4jNK+Au cXNJOwvEMgWJY1O/gsU5BTwkzjR8Y4PY5S4x7c51xgmMvAsYGVYxiqYWJBcUJ6XnGukVJ+YW l+al6yXn525iBAf7M+kdjKsaLA4xCnAwKvHwbrTcFiDEmlhWXJl7iFGCg1lJhFfzD1CINyWx siq1KD++qDQntfgQow/QVROZpUST84GRmFcSb2hsYm5qbGppYmFiZolDWEmct9kjJUBIID2x JDU7NbUgtQhmHBMHp1QDY6kIY9QLV3/2pAsJM6s8bdM2s52OaJ9xM7KjagOT6fR1AupPF5dl S3mI65oZ8zGu8478xf/ag3WDjw4j67H906X71512sO/vLGs805FfWzf9zLJ58/XMVSfZ+a8v Wfl+tcKf1hL+XxIxoUtnXMu5k7o6PynnnKH70tMP/T/rXSzcHDB7/98uJZbijERDLeai4kQA 1qNS/qMCAAA= X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQncJNp5aaO68lx2qhBtnRuWHRGSVJj35ElN7+wXjdnEbXp3qfN65vxIcbnMFbKTmqFAG81j Api is added to decode peripheral id based on the interrupt number of the peripheral. Signed-off-by: Rajeshwari Shinde --- Chnages in V3: - New patch added. Chnages in V4: - Renamed decode_periph_id to pinmux_decode_periph_id. - Added comments in periph.h as suggested by Simon Glass. arch/arm/cpu/armv7/exynos/pinmux.c | 28 ++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/periph.h | 31 ++++++++++++++++------------ arch/arm/include/asm/arch-exynos/pinmux.h | 8 +++++++ 3 files changed, 54 insertions(+), 13 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index f02f441..f9f6911 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -22,6 +22,7 @@ */ #include +#include #include #include #include @@ -396,3 +397,30 @@ int exynos_pinmux_config(int peripheral, int flags) return -1; } } + +#ifdef CONFIG_OF_CONTROL +static int exynos5_pinmux_decode_periph_id(const void *blob, int node) +{ + int err; + u32 cell[3]; + + err = fdtdec_get_int_array(blob, node, "interrupts", cell, + ARRAY_SIZE(cell)); + if (err) + return PERIPH_ID_NONE; + + if ((130 > cell[1]) || (cell[1] < 31)) + return cell[1]; + + debug(" invalid peripheral id\n"); + return PERIPH_ID_NONE; +} + +int pinmux_decode_periph_id(const void *blob, int node) +{ + if (cpu_is_exynos5()) + return exynos5_pinmux_decode_periph_id(blob, node); + else + return PERIPH_ID_NONE; +} +#endif diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h index 13abd2d..783b77c 100644 --- a/arch/arm/include/asm/arch-exynos/periph.h +++ b/arch/arm/include/asm/arch-exynos/periph.h @@ -25,12 +25,17 @@ #define __ASM_ARM_ARCH_PERIPH_H /* - * Peripherals requiring clock/pinmux configuration. List will + * Peripherals requiring pinmux configuration0. List will * grow with support for more devices getting added. + * Numbering based on interrupt table. * */ enum periph_id { - PERIPH_ID_I2C0, + PERIPH_ID_UART0 = 51, + PERIPH_ID_UART1, + PERIPH_ID_UART2, + PERIPH_ID_UART3, + PERIPH_ID_I2C0 = 56, PERIPH_ID_I2C1, PERIPH_ID_I2C2, PERIPH_ID_I2C3, @@ -38,22 +43,22 @@ enum periph_id { PERIPH_ID_I2C5, PERIPH_ID_I2C6, PERIPH_ID_I2C7, - PERIPH_ID_I2S1, - PERIPH_ID_SDMMC0, + PERIPH_ID_SPI0 = 68, + PERIPH_ID_SPI1, + PERIPH_ID_SPI2, + PERIPH_ID_SDMMC0 = 75, PERIPH_ID_SDMMC1, PERIPH_ID_SDMMC2, PERIPH_ID_SDMMC3, - PERIPH_ID_SDMMC4, - PERIPH_ID_SROMC, - PERIPH_ID_SPI0, - PERIPH_ID_SPI1, - PERIPH_ID_SPI2, + PERIPH_ID_I2S1 = 99, + +/* Since following peripherals do not have shared peripheral interrupts (SPIs) + * they are numbered arbitiraly after the maximum SPIs Exynos has (128) + */ + PERIPH_ID_SROMC = 128, PERIPH_ID_SPI3, PERIPH_ID_SPI4, - PERIPH_ID_UART0, - PERIPH_ID_UART1, - PERIPH_ID_UART2, - PERIPH_ID_UART3, + PERIPH_ID_SDMMC4, PERIPH_ID_COUNT, PERIPH_ID_NONE = -1, diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h b/arch/arm/include/asm/arch-exynos/pinmux.h index 10ea736..00cbb0d 100644 --- a/arch/arm/include/asm/arch-exynos/pinmux.h +++ b/arch/arm/include/asm/arch-exynos/pinmux.h @@ -55,4 +55,12 @@ enum { */ int exynos_pinmux_config(int peripheral, int flags); +/** + * Decode the peripheral id using the interrpt numbers. + * + * @param blob Device tree blbo + * @param node FDT I2C node to find + * @return peripheral id if ok, PERIPH_ID_NONE on error + */ +int pinmux_decode_periph_id(const void *blob, int node); #endif