From patchwork Tue Oct 2 13:16:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 11918 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 4505A24146 for ; Tue, 2 Oct 2012 13:17:08 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id C2713A186C6 for ; Tue, 2 Oct 2012 13:17:07 +0000 (UTC) Received: by ieje10 with SMTP id e10so14074508iej.11 for ; Tue, 02 Oct 2012 06:17:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=3lx+ibKE8EmH4yHHT1ZtdRSD0G93OB7RI7UPWhp4HKU=; b=kG+B/U+uc8YKlK0ilcjg/68WKc6BbxA3OoVPkZ0nTsxLgBn4orwW8etYG9HL/KeFsx TpKNOpdaKeAcIKKiNu/i3j3rGbSq6gCElgT8DVxNyL+67QvLaxxW5jbnx1rPH9CysiTr 8yEBojwCKCraf/gWkHrNMfiI+fcWnRldfyZjU1mJed/C4cNdyYszS7euvb0lkwizDE8C AvBjKOPWS3EeQSVFMQ3DAkCb9+5aFFDWIt01IBlkkzDsmhv+PR3ikhgJPTyX1AVmFDmR C38ANFN75UTo5IqxDQ/waLxgSS+NKjIHgOZ2HxcM5AXe2KVX9rpjcIdj36uRBGPemKUW Q8qQ== Received: by 10.50.184.129 with SMTP id eu1mr8833890igc.0.1349183827124; Tue, 02 Oct 2012 06:17:07 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp81663igc; Tue, 2 Oct 2012 06:17:06 -0700 (PDT) Received: by 10.66.83.234 with SMTP id t10mr44095192pay.39.1349183826041; Tue, 02 Oct 2012 06:17:06 -0700 (PDT) Received: from mail-pa0-f50.google.com (mail-pa0-f50.google.com [209.85.220.50]) by mx.google.com with ESMTPS id iw4si2062579pbc.201.2012.10.02.06.17.05 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 02 Oct 2012 06:17:06 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.50 is neither permitted nor denied by best guess record for domain of chander.kashyap@linaro.org) client-ip=209.85.220.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.50 is neither permitted nor denied by best guess record for domain of chander.kashyap@linaro.org) smtp.mail=chander.kashyap@linaro.org Received: by mail-pa0-f50.google.com with SMTP id hz11so5953179pad.37 for ; Tue, 02 Oct 2012 06:17:05 -0700 (PDT) Received: by 10.66.77.7 with SMTP id o7mr44136513paw.37.1349183825780; Tue, 02 Oct 2012 06:17:05 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id d1sm714150pay.25.2012.10.02.06.17.03 (version=SSLv3 cipher=OTHER); Tue, 02 Oct 2012 06:17:05 -0700 (PDT) From: Chander Kashyap To: u-boot@lists.denx.de Cc: mk7.kang@samsung.com, linaro-dev@lists.linaro.org, patches@linaro.org, Chander Kashyap Subject: [PATCH v2 1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses Date: Tue, 2 Oct 2012 18:46:47 +0530 Message-Id: <1349183809-15976-2-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1349183809-15976-1-git-send-email-chander.kashyap@linaro.org> References: <1349183809-15976-1-git-send-email-chander.kashyap@linaro.org> X-Gm-Message-State: ALoCoQkjkPsHjaEfQ+NhiAH4dWs9h1YV6qqM0N0lDXiDXz7U5twnvnCjrvH5/IR2PpRA01Ojkm2U This patch populates base addresses of Exynos4x12 registers. Signed-off-by: Chander Kashyap --- arch/arm/include/asm/arch-exynos/cpu.h | 48 +++++++++++++++++++++++++++----- 1 file changed, 41 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 2bde10c..680b93b 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -27,7 +27,7 @@ #define EXYNOS_CPU_NAME "Exynos" #define EXYNOS4_ADDR_BASE 0x10000000 -/* EXYNOS4 */ +/* EXYNOS4 Common*/ #define EXYNOS4_GPIO_PART3_BASE 0x03860000 #define EXYNOS4_PRO_ID 0x10000000 #define EXYNOS4_SYSREG_BASE 0x10010000 @@ -58,7 +58,37 @@ #define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE -/* EXYNOS5 */ +/* EXYNOS4X12 */ +#define EXYNOS4X12_GPIO_PART3_BASE 0x03860000 +#define EXYNOS4X12_PRO_ID 0x10000000 +#define EXYNOS4X12_SYSREG_BASE 0x10010000 +#define EXYNOS4X12_POWER_BASE 0x10020000 +#define EXYNOS4X12_SWRESET 0x10020400 +#define EXYNOS4X12_USBPHY_CONTROL 0x10020704 +#define EXYNOS4X12_CLOCK_BASE 0x10030000 +#define EXYNOS4X12_SYSTIMER_BASE 0x10050000 +#define EXYNOS4X12_WATCHDOG_BASE 0x10060000 +#define EXYNOS4X12_DMC0_BASE 0x10600000 +#define EXYNOS4X12_DMC1_BASE 0x10610000 +#define EXYNOS4X12_GPIO_PART4_BASE 0x106E0000 +#define EXYNOS4X12_GPIO_PART2_BASE 0x11000000 +#define EXYNOS4X12_GPIO_PART1_BASE 0x11400000 +#define EXYNOS4X12_FIMD_BASE 0x11C00000 +#define EXYNOS4X12_MIPI_DSIM_BASE 0x11C80000 +#define EXYNOS4X12_USBOTG_BASE 0x12480000 +#define EXYNOS4X12_MMC_BASE 0x12510000 +#define EXYNOS4X12_SROMC_BASE 0x12570000 +#define EXYNOS4X12_USB_HOST_EHCI_BASE 0x12580000 +#define EXYNOS4X12_USBPHY_BASE 0x125B0000 +#define EXYNOS4X12_UART_BASE 0x13800000 +#define EXYNOS4X12_I2C_BASE 0x13860000 +#define EXYNOS4X12_PWMTIMER_BASE 0x139D0000 + +#define EXYNOS4X12_ADC_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE + +/* EXYNOS5 Common*/ #define EXYNOS5_I2C_SPACING 0x10000 #define EXYNOS5_GPIO_PART4_BASE 0x03860000 @@ -146,17 +176,21 @@ static inline int proid_is_##type(void) \ } IS_EXYNOS_TYPE(exynos4210, 0x4210) +IS_EXYNOS_TYPE(exynos4412, 0x4412) IS_EXYNOS_TYPE(exynos5250, 0x5250) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ { \ - if (cpu_is_exynos4()) \ - return EXYNOS4_##base; \ - else if (cpu_is_exynos5()) \ + if (cpu_is_exynos4()) { \ + if (proid_is_exynos4412()) \ + return EXYNOS4X12_##base; \ + else \ + return EXYNOS4_##base; \ + } else if (cpu_is_exynos5()) { \ return EXYNOS5_##base; \ - else \ - return 0; \ + } \ + return 0; \ } SAMSUNG_BASE(adc, ADC_BASE)