From patchwork Mon Jun 18 16:25:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 9394 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 6B03D23EB4 for ; Mon, 18 Jun 2012 16:25:53 +0000 (UTC) Received: from mail-gg0-f180.google.com (mail-gg0-f180.google.com [209.85.161.180]) by fiordland.canonical.com (Postfix) with ESMTP id 3B83FA184F3 for ; Mon, 18 Jun 2012 16:25:53 +0000 (UTC) Received: by mail-gg0-f180.google.com with SMTP id f1so4159723ggn.11 for ; Mon, 18 Jun 2012 09:25:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=xY6KmgGX+3gpUmHu3mJXC1GKFmfSO5hKPWnOUCEj9K4=; b=Pgrnf0+n1osbWa2LIXTp4X6Cl7ollY8yKyhLs5VOXJKT+b+geAHvsn4bjQEkPv886F Fr+BiBW4lf3mE6kzpbT36KSrfCQuREL+PFWesmha6N900VJele4YHDy2pkEAhwvFTlkc 9ICz7uXNAOXbpMWQQxcn0jnr6m4OMpIfe3RI8A6B6dStdADuDwtdL7baKvVKOzbT99kx V0Bm+CsCgXLzc72srIDZT6lwf4vI2xDWxF9rC4Hr2lt/9Vvf9acndbXAAcY2dDu6vIDs +T2nrV60JbR7gtuqm+rzdKINpvtGtudPJT3L047AMsUYyOndj+NF3vOgpfcnHBUKCbJx DjOQ== Received: by 10.50.87.227 with SMTP id bb3mr1117927igb.57.1340036752749; Mon, 18 Jun 2012 09:25:52 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.24.148 with SMTP id v20csp77277ibb; Mon, 18 Jun 2012 09:25:52 -0700 (PDT) Received: by 10.68.200.232 with SMTP id jv8mr53426555pbc.161.1340036752041; Mon, 18 Jun 2012 09:25:52 -0700 (PDT) Received: from mail-pz0-f50.google.com (mail-pz0-f50.google.com [209.85.210.50]) by mx.google.com with ESMTPS id gk9si25764445pbc.338.2012.06.18.09.25.51 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 18 Jun 2012 09:25:52 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.210.50 is neither permitted nor denied by best guess record for domain of mathieu.poirier@linaro.org) client-ip=209.85.210.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.210.50 is neither permitted nor denied by best guess record for domain of mathieu.poirier@linaro.org) smtp.mail=mathieu.poirier@linaro.org Received: by mail-pz0-f50.google.com with SMTP id h15so8066502dan.37 for ; Mon, 18 Jun 2012 09:25:51 -0700 (PDT) Received: by 10.68.223.198 with SMTP id qw6mr37013036pbc.94.1340036751800; Mon, 18 Jun 2012 09:25:51 -0700 (PDT) Received: from localhost.localdomain (S0106002369de4dac.cg.shawcable.net. [70.73.24.112]) by mx.google.com with ESMTPS id mq8sm51844pbb.64.2012.06.18.09.25.50 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 18 Jun 2012 09:25:51 -0700 (PDT) From: mathieu.poirier@linaro.org To: u-boot@lists.denx.de Cc: patches@linaro.org, mathieu.poirier@linaro.org, lee.jones@linaro.org Subject: [PATCH 06/11] snowball: applying power to LAN and GBF controllers Date: Mon, 18 Jun 2012 10:25:31 -0600 Message-Id: <1340036736-2436-7-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1340036736-2436-1-git-send-email-mathieu.poirier@linaro.org> References: <1340036736-2436-1-git-send-email-mathieu.poirier@linaro.org> X-Gm-Message-State: ALoCoQmM7AEgBB2RIajH1z3/HpyuvaJL3p0tQtxVDVXhX6BvIC5ZRwPi2GawpO2kNuih0HE9w2/g From: "Mathieu J. Poirier" LAN and GBF need to be powered explicitely, doing so with interface to AB8500 companion chip. Signed-off-by: Mathieu Poirier Signed-off-by: John Rigby --- arch/arm/include/asm/arch-u8500/hardware.h | 11 +++- arch/arm/include/asm/arch-u8500/prcmu.h | 7 ++- board/st-ericsson/snowball/snowball.c | 87 ++++++++++++++++++++++++++++ include/configs/snowball.h | 2 +- 4 files changed, 103 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/arch-u8500/hardware.h b/arch/arm/include/asm/arch-u8500/hardware.h index 9208880..8044ac3 100644 --- a/arch/arm/include/asm/arch-u8500/hardware.h +++ b/arch/arm/include/asm/arch-u8500/hardware.h @@ -62,7 +62,7 @@ /* Per4 */ #define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) -#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x06800) +#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000) /* Per3 */ #define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) @@ -80,4 +80,13 @@ #define U8500_BOOTROM_BASE 0x9001f000 #define U8500_BOOTROM_ASIC_ID_OFFSET 0x0ff4 +/* AB8500 specifics */ +#define AB8500_MISC 0x0010 +#define AB8500_GPIO_SEL2_REG 0x1001 +#define AB8500_GPIO_DIR2_REG 0x1011 +#define AB8500_GPIO_DIR4_REG 0x1013 +#define AB8500_GPIO_SEL4_REG 0x1003 +#define AB8500_GPIO_OUT2_REG 0x1021 +#define AB8500_GPIO_OUT4_REG 0x1023 + #endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-u8500/prcmu.h b/arch/arm/include/asm/arch-u8500/prcmu.h index 9862eb3..e9dcc93 100644 --- a/arch/arm/include/asm/arch-u8500/prcmu.h +++ b/arch/arm/include/asm/arch-u8500/prcmu.h @@ -64,8 +64,11 @@ #define REQ_MB5 5 -extern int prcmu_i2c_read(u8 reg, u16 slave); -extern int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data); +#define ab8500_read prcmu_i2c_read +#define ab8500_write prcmu_i2c_write + +int prcmu_i2c_read(u8 reg, u16 slave); +int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data); void u8500_prcmu_enable(u32 *reg); void db8500_prcmu_init(void); diff --git a/board/st-ericsson/snowball/snowball.c b/board/st-ericsson/snowball/snowball.c index 79c86df..bc95c50 100644 --- a/board/st-ericsson/snowball/snowball.c +++ b/board/st-ericsson/snowball/snowball.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include "db8500_pins.h" @@ -183,3 +185,88 @@ int dram_init(void) return 0; } + +static int raise_ab8500_gpio16(void) +{ + int ret; + + /* selection */ + ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG); + if (ret < 0) + goto out; + + ret |= 0x80; + ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret); + if (ret < 0) + goto out; + + /* direction */ + ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG); + if (ret < 0) + goto out; + + ret |= 0x80; + ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret); + if (ret < 0) + goto out; + + /* out */ + ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG); + if (ret < 0) + goto out; + + ret |= 0x80; + ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret); + +out: + return ret; +} + +static int raise_ab8500_gpio26(void) +{ + int ret; + + /* selection */ + ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG); + if (ret < 0) + goto out; + + ret |= 0x2; + ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret); + if (ret < 0) + goto out; + + /* out */ + ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG); + if (ret < 0) + goto out; + + ret |= 0x2; + ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret); + +out: + return ret; +} + +int board_late_init(void) +{ + /* enable 3V3 for LAN controller */ + if (raise_ab8500_gpio26() >= 0) { + /* Turn on FSMC device */ + writel(0x1, 0x8000f000); + writel(0x1, 0x8000f008); + + /* setup FSMC for LAN controler */ + writel(0x305b, 0x80000000); + + /* run at the highest possible speed */ + writel(0x01010210, 0x80000004); + } else + printf("error: can't raise GPIO26\n"); + + /* enable 3v6 for GBF chip */ + if ((raise_ab8500_gpio16() < 0)) + printf("error: cant' raise GPIO16\n"); + + return 0; +} diff --git a/include/configs/snowball.h b/include/configs/snowball.h index f959417..e9f4fb1 100644 --- a/include/configs/snowball.h +++ b/include/configs/snowball.h @@ -32,7 +32,7 @@ #define CONFIG_SYS_ICACHE_OFF 1 #define CONFIG_SYS_DCACHE_OFF 1 #define CONFIG_ARCH_CPU_INIT 1 - +#define CONFIG_BOARD_LATE_INIT 1 /* * High Level Configuration Options * (easy to change)