From patchwork Mon May 14 15:52:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Shinde X-Patchwork-Id: 8599 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0734123EAB for ; Mon, 14 May 2012 15:49:15 +0000 (UTC) Received: from mail-wi0-f182.google.com (mail-wi0-f182.google.com [209.85.212.182]) by fiordland.canonical.com (Postfix) with ESMTP id F29C5A18038 for ; Mon, 14 May 2012 15:49:14 +0000 (UTC) Received: by wibhm6 with SMTP id hm6so1719064wib.17 for ; Mon, 14 May 2012 08:49:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:x-auditid :from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-brightmail-tracker:x-tm-as-mml:x-gm-message-state; bh=/wNDlY9Z4bnZTe8FI9vhqq+jkEo5KVJo0oAGxmzTRaw=; b=amYqao/ITWScTFqzM0HPHrdpWV8gcI2RDfwxz9a9+ZeHkQcxd+9TbDR+MOp2KjzcyH FvAspzYJRFoNUJYWudd7PgbePUZWZXf+PgUnXPQmzQ7beMxNpIheBmPmkruqbNTeIQxG B7QLOpNec5QTesbES7CRxlpzHvOekCMZ2rGvg8Q5T6DLN01hktIv0scNclL6WEGvjNcS cmRblREntzOVDEhMTRFUDcPMLc16pd15kRzjWsWHdwqKGJeWmN98oiKVvkjLJZG7nIx2 A6JQcaOd8JI2RWgKK2aEcFUtj3r/K4laCGU6Q4iWFgbrkLTDWlvhxbaiJs5SiLWAI2OJ MDnA== Received: by 10.50.163.99 with SMTP id yh3mr4465527igb.53.1337010554275; Mon, 14 May 2012 08:49:14 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.35.72 with SMTP id o8csp353078ibd; Mon, 14 May 2012 08:49:13 -0700 (PDT) Received: by 10.68.216.33 with SMTP id on1mr23727933pbc.105.1337010553469; Mon, 14 May 2012 08:49:13 -0700 (PDT) Received: from mailout3.samsung.com (mailout3.samsung.com. [203.254.224.33]) by mx.google.com with ESMTP id rh8si8453638pbc.130.2012.05.14.08.49.13; Mon, 14 May 2012 08:49:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (mailout3.samsung.com [203.254.224.33]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M40006M3RXU5910@mailout3.samsung.com> for patches@linaro.org; Tue, 15 May 2012 00:49:12 +0900 (KST) X-AuditID: cbfee61a-b7bbeae000003a71-62-4fb129784c94 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (MMPCPMTA) with SMTP id 2A.32.14961.87921BF4; Tue, 15 May 2012 00:49:12 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M40002S8RXONL70@mmp1.samsung.com> for patches@linaro.org; Tue, 15 May 2012 00:49:12 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, marex@denx.de, l.majewski@samsung.com, sjg@chromium.org, clchiou@chromium.org, waihong@chromium.org, mk7.kang@samsung.com, k.chander@samsung.com, gautam.vivek@samsung.com Subject: [PATCH 4/6 V4] EXYNOS: Add power Enable/Disable for USB-EHCI Date: Mon, 14 May 2012 21:22:03 +0530 Message-id: <1337010725-24807-4-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1337010725-24807-1-git-send-email-rajeshwari.s@samsung.com> References: <1337010725-24807-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: AAAAAA== X-TM-AS-MML: No X-Gm-Message-State: ALoCoQmD0hg644QhvSq957G1r5cZ4+uUxrByt5k+sH8HkNZ+Qo4zozybZeAm9kNux/G7aneflZaX This patch adds functions to enable/disable the power of USB host controller for EXYNOS5. Signed-off-by: Vivek Gautam Signed-off-by: Che-Liang Chiou Signed-off-by: Rajeshwari Shinde --- Changes for V4: -Renamed exynos5_set_usb_phy_ctrl and set_usb_phy_ctrl to exynos5_set_usbhost_phy_ctrl and set_usbhost_phy_ctrl. arch/arm/cpu/armv7/exynos/power.c | 22 ++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/power.h | 4 ++++ drivers/usb/host/ehci-exynos.c | 5 +++++ 3 files changed, 31 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index c765304..4116781 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -52,3 +52,25 @@ void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable) if (cpu_is_exynos4()) exynos4_mipi_phy_control(dev_index, enable); } + +void exynos5_set_usbhost_phy_ctrl(unsigned int enable) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + if (enable) { + /* Enabling USBHOST_PHY */ + setbits_le32(&power->usbhost_phy_control, + POWER_USB_HOST_PHY_CTRL_EN); + } else { + /* Disabling USBHOST_PHY */ + clrbits_le32(&power->usbhost_phy_control, + POWER_USB_HOST_PHY_CTRL_EN); + } +} + +void set_usbhost_phy_ctrl(unsigned int enable) +{ + if (cpu_is_exynos5()) + exynos5_set_usbhost_phy_ctrl(enable); +} diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h index 4236beb..e5467e2 100644 --- a/arch/arm/include/asm/arch-exynos/power.h +++ b/arch/arm/include/asm/arch-exynos/power.h @@ -855,4 +855,8 @@ void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable); #define EXYNOS_MIPI_PHY_SRESETN (1 << 1) #define EXYNOS_MIPI_PHY_MRESETN (1 << 2) +void set_usbhost_phy_ctrl(unsigned int enable); + +#define POWER_USB_HOST_PHY_CTRL_EN (1 << 0) +#define POWER_USB_HOST_PHY_CTRL_DISABLE (0 << 0) #endif diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index 90d66d3..a71b397 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "ehci.h" #include "ehci-core.h" @@ -33,6 +34,8 @@ static void setup_usb_phy(struct exynos_usb_phy *usb) { set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN); + set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN); + clrbits_le32(&usb->usbphyctrl0, HOST_CTRL0_FSEL_MASK | HOST_CTRL0_COMMONON_N | @@ -73,6 +76,8 @@ static void reset_usb_phy(struct exynos_usb_phy *usb) HOST_CTRL0_SIDDQ | HOST_CTRL0_FORCESUSPEND | HOST_CTRL0_FORCESLEEP); + + set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE); } /*