From patchwork Tue May 8 10:11:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Shinde X-Patchwork-Id: 8460 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 9394D23E23 for ; Tue, 8 May 2012 10:10:32 +0000 (UTC) Received: from mail-yx0-f180.google.com (mail-yx0-f180.google.com [209.85.213.180]) by fiordland.canonical.com (Postfix) with ESMTP id 63947A187E3 for ; Tue, 8 May 2012 10:10:32 +0000 (UTC) Received: by mail-yx0-f180.google.com with SMTP id q6so193060yen.11 for ; Tue, 08 May 2012 03:10:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:x-auditid :from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-brightmail-tracker:x-tm-as-mml:x-gm-message-state; bh=t/QTOet4IhSrYocoYpDBaHmGpLzZ8Hp9wDC/sp6N+4c=; b=PMKAPay5nlrboRlOGK5b2aNMUoPqwVfQqhVEQnalUh2yBcjl5KBtNRNz/teDfNNqnK G9d+WrAY99aDtbwJU0qTfy4IQ2Oie5wYBz9dMzCyofIGqvi7sZWZZMmtoWnYW18xWsu6 pvPg+DXz+prTovCAzpJC6E2t3gFeoHduS/q9VzlsHORdMM0p7Euk7AvmcnXe9fi3Cipb 311zgAs0oog0luDYP4Tfn1Yr7MvbGDWi9kxZqo/P5knUAqyF+dmVomaaRrTN22LpTev+ dqLp0WN1GG5rDcTmP+f/8qtZrmIFEjEimlTcS3LEpS1YrfnYfFjJSKcngWpGlaI1P8bt 922A== Received: by 10.50.57.129 with SMTP id i1mr10386719igq.33.1336471831952; Tue, 08 May 2012 03:10:31 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.73.147 with SMTP id q19csp188731ibj; Tue, 8 May 2012 03:10:31 -0700 (PDT) Received: by 10.68.231.195 with SMTP id ti3mr24223252pbc.96.1336471831248; Tue, 08 May 2012 03:10:31 -0700 (PDT) Received: from mailout4.samsung.com (mailout4.samsung.com. [203.254.224.34]) by mx.google.com with ESMTP id t9si1813870pbj.342.2012.05.08.03.10.30; Tue, 08 May 2012 03:10:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.34 as permitted sender) client-ip=203.254.224.34; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.34 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (mailout4.samsung.com [203.254.224.34]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M3P0079T88Q4GD0@mailout4.samsung.com> for patches@linaro.org; Tue, 08 May 2012 19:10:30 +0900 (KST) X-AuditID: cbfee61a-b7b97ae000004342-47-4fa8f11516ee Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (MMPCPMTA) with SMTP id 06.6F.17218.511F8AF4; Tue, 08 May 2012 19:10:30 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M3P002KH87WVYL0@mmp2.samsung.com> for patches@linaro.org; Tue, 08 May 2012 19:10:29 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, marex@denx.de, l.majewski@samsung.com, sjg@chromium.org, clchiou@chromium.org, waihong@chromium.org, mk7.kang@samsung.com, k.chander@samsung.com, gautam.vivek@samsung.com Subject: [PATCH 3/6 V3] USB: EXYNOS: Set USB 2.0 HOST Link mode Date: Tue, 08 May 2012 15:41:59 +0530 Message-id: <1336471922-19336-4-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1336471922-19336-1-git-send-email-rajeshwari.s@samsung.com> References: <1336471922-19336-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: AAAAAA== X-TM-AS-MML: No X-Gm-Message-State: ALoCoQlwgd2EFtTEtDoohEG3kPEZlLf3buaDYDsmOxOZl5mHb3sVpvsy4BZVxX2Z7zVwGQw1qLLY This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde Acked-by: Minkyu Kang --- Changes for v2: - Setting SYSREG registers was moved to System.c - This setting of SYSREG registers was moved to seperate patch Changes for v3: - Placed setting usbhost function to top of set_system_display - Renamed enable_usbhost_mode and exynos5_enable_usbhost_mode to set_usbhost_mode and exynos5_set_usbhost_mode. This patch is based on: USB: EXYNOS: Add ehci support.patch arch/arm/cpu/armv7/exynos/system.c | 22 ++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/system.h | 3 +++ drivers/usb/host/ehci-exynos.c | 3 +++ 3 files changed, 28 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/system.c b/arch/arm/cpu/armv7/exynos/system.c index 6c34730..cc6ee03 100644 --- a/arch/arm/cpu/armv7/exynos/system.c +++ b/arch/arm/cpu/armv7/exynos/system.c @@ -25,6 +25,28 @@ #include #include +static void exynos5_set_usbhost_mode(unsigned int mode) +{ + struct exynos5_sysreg *sysreg = + (struct exynos5_sysreg *)samsung_get_base_sysreg(); + unsigned int phy_cfg; + + /* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */ + if (mode == USB20_PHY_CFG_HOST_LINK_EN) { + setbits_le32(&sysreg->usb20phy_cfg, + USB20_PHY_CFG_HOST_LINK_EN); + } else { + clrbits_le32(&sysreg->usb20phy_cfg, + USB20_PHY_CFG_HOST_LINK_EN); + } +} + +void set_usbhost_mode(unsigned int mode) +{ + if (cpu_is_exynos5()) + exynos5_set_usbhost_mode(mode); +} + static void exynos4_set_system_display(void) { struct exynos4_sysreg *sysreg = diff --git a/arch/arm/include/asm/arch-exynos/system.h b/arch/arm/include/asm/arch-exynos/system.h index c1d880f..42e1d21 100644 --- a/arch/arm/include/asm/arch-exynos/system.h +++ b/arch/arm/include/asm/arch-exynos/system.h @@ -49,6 +49,9 @@ struct exynos5_sysreg { }; #endif +#define USB20_PHY_CFG_HOST_LINK_EN (1 << 0) + +void set_usbhost_mode(unsigned int mode); void set_system_display_ctrl(void); #endif /* _EXYNOS4_SYSTEM_H */ diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index 3830c43..90d66d3 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -24,12 +24,15 @@ #include #include #include +#include #include "ehci.h" #include "ehci-core.h" /* Setup the EHCI host controller. */ static void setup_usb_phy(struct exynos_usb_phy *usb) { + set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN); + clrbits_le32(&usb->usbphyctrl0, HOST_CTRL0_FSEL_MASK | HOST_CTRL0_COMMONON_N |