From patchwork Wed Nov 9 16:16:17 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 4979 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2C5B023E0C for ; Wed, 9 Nov 2011 16:16:24 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 20A81A18596 for ; Wed, 9 Nov 2011 16:16:24 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id n26so2571813faa.11 for ; Wed, 09 Nov 2011 08:16:24 -0800 (PST) Received: by 10.152.102.148 with SMTP id fo20mr1928667lab.51.1320855383964; Wed, 09 Nov 2011 08:16:23 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.10.72 with SMTP id g8cs176232lab; Wed, 9 Nov 2011 08:16:23 -0800 (PST) Received: by 10.204.145.211 with SMTP id e19mr2258595bkv.55.1320855383487; Wed, 09 Nov 2011 08:16:23 -0800 (PST) Received: from mail.df.lth.se (mail.df.lth.se. [194.47.250.12]) by mx.google.com with ESMTPS id d4si3099902bke.132.2011.11.09.08.16.22 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 09 Nov 2011 08:16:23 -0800 (PST) Received-SPF: neutral (google.com: 194.47.250.12 is neither permitted nor denied by best guess record for domain of linus.walleij@linaro.org) client-ip=194.47.250.12; Authentication-Results: mx.google.com; spf=neutral (google.com: 194.47.250.12 is neither permitted nor denied by best guess record for domain of linus.walleij@linaro.org) smtp.mail=linus.walleij@linaro.org Received: from Fecusia (c83-249-208-177.bredband.comhem.se [83.249.208.177]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.df.lth.se (Postfix) with ESMTPSA id 7AE6E65D78; Wed, 9 Nov 2011 17:16:22 +0100 (CET) Received: by Fecusia (sSMTP sendmail emulation); Wed, 9 Nov 2011 17:16:21 +0100 From: Linus Walleij To: Albert ARIBAUD Cc: u-boot@lists.denx.de, Linus Walleij Subject: [PATCH 6/7 v3] integrator: add system controller header Date: Wed, 9 Nov 2011 17:16:17 +0100 Message-Id: <1320855377-4256-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.7.6.4 Break out the AP system controller and CP "CP controller" registers into a header file, it gives better overview than hardcoding its values and other disturbing practices. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EA1C8E7.7090105@aribaud.net ChangeLog v2->v3: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EB84700.1030109@aribaud.net --- board/armltd/integrator/integrator-sc.h | 91 +++++++++++++++++++++++++++++++ 1 files changed, 91 insertions(+), 0 deletions(-) create mode 100644 board/armltd/integrator/integrator-sc.h diff --git a/board/armltd/integrator/integrator-sc.h b/board/armltd/integrator/integrator-sc.h new file mode 100644 index 0000000..279dc55 --- /dev/null +++ b/board/armltd/integrator/integrator-sc.h @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2011 + * Linaro + * Linus Walleij + * Register definitions for the System Controller (SC) and + * the similar "CP Controller" found in the ARM Integrator/AP and + * Integrator/CP reference designs + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ARM_SC_H +#define __ARM_SC_H + +#define SC_BASE 0x11000000 + +/* + * The system controller registers + */ +#define SC_ID_OFFSET 0x00 +#define SC_OSC_OFFSET 0x04 +/* Setting this bit switches to 25 MHz mode, clear means 33 MHz */ +#define SC_OSC_DIVXY (1 << 8) +#define SC_CTRLS_OFFSET 0x08 +#define SC_CTRLC_OFFSET 0x0C +/* Set bits by writing CTRLS, clear bits by writing CTRLC */ +#define SC_CTRL_SOFTRESET (1 << 0) +#define SC_CTRL_FLASHVPP (1 << 1) +#define SC_CTRL_FLASHWP (1 << 2) +#define SC_CTRL_UART1DTR (1 << 4) +#define SC_CTRL_UART1RTS (1 << 5) +#define SC_CTRL_UART0DTR (1 << 6) +#define SC_CTRL_UART0RTS (1 << 7) +#define SC_DEC_OFFSET 0x10 +#define SC_ARB_OFFSET 0x14 +#define SC_PCI_OFFSET 0x18 +#define SC_PCI_PCIEN (1 << 0) +#define SC_PCI_PCIBINT_CLR (1 << 1) +#define SC_LOCK_OFFSET 0x1C +#define SC_LBFADDR_OFFSET 0x20 +#define SC_LBFCODE_OFFSET 0x24 + +#define SC_ID (SC_BASE + SC_ID_OFFSET) +#define SC_OSC (SC_BASE + SC_OSC_OFFSET) +#define SC_CTRLS (SC_BASE + SC_CTRLS_OFFSET) +#define SC_CTRLC (SC_BASE + SC_CTRLC_OFFSET) +#define SC_DEC (SC_BASE + SC_DEC_OFFSET) +#define SC_ARB (SC_BASE + SC_ARB_OFFSET) +#define SC_PCI (SC_BASE + SC_PCI_OFFSET) +#define SC_LOCK (SC_BASE + SC_LOCK_OFFSET) +#define SC_LBFADDR (SC_BASE + SC_LBFADDR_OFFSET) +#define SC_LBFCODE (SC_BASE + SC_LBFCODE_OFFSET) + +/* + * The Integrator/CP as a smaller set of registers, at a different + * offset - probably not to disturb old software. + */ + +#define CP_BASE 0xCB000000 + +#define CP_IDFIELD_OFFSET 0x00 +#define CP_FLASHPROG_OFFSET 0x04 +#define CP_FLASHPROG_FLVPPEN (1 << 0) +#define CP_FLASHPROG_FLWREN (1 << 1) +#define CP_FLASHPROG_FLASHSIZE (1 << 2) +#define CP_FLASHPROG_EXTRABANK (1 << 3) +#define CP_INTREG_OFFSET 0x08 +#define CP_DECODE_OFFSET 0x0C + +#define CP_IDFIELD (CP_BASE + CP_ID_OFFSET) +#define CP_FLASHPROG (CP_BASE + CP_FLASHPROG_OFFSET) +#define CP_INTREG (CP_BASE + CP_INTREG_OFFSET) +#define CP_DECODE (CP_BASE + CP_DECODE_OFFSET) + +#endif