From patchwork Mon Feb 28 11:46:11 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aneesh V X-Patchwork-Id: 221 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:41:01 -0000 Delivered-To: patches@linaro.org Received: by 10.224.19.208 with SMTP id c16cs91640qab; Mon, 28 Feb 2011 03:46:27 -0800 (PST) Received: by 10.150.144.17 with SMTP id r17mr7012221ybd.343.1298893587314; Mon, 28 Feb 2011 03:46:27 -0800 (PST) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by mx.google.com with ESMTPS id p2si6095270ybk.77.2011.02.28.03.46.27 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 28 Feb 2011 03:46:27 -0800 (PST) Received-SPF: pass (google.com: domain of aneesh@ti.com designates 192.94.94.41 as permitted sender) client-ip=192.94.94.41; Authentication-Results: mx.google.com; spf=pass (google.com: domain of aneesh@ti.com designates 192.94.94.41 as permitted sender) smtp.mail=aneesh@ti.com Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p1SBkNdc029471 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 28 Feb 2011 05:46:25 -0600 Received: from localhost (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p1SBkM0E011764; Mon, 28 Feb 2011 17:16:22 +0530 (IST) From: Aneesh V To: u-boot@lists.denx.de Cc: aneesh@ti.com, x-loader@googlegroups.com, patches@linaro.org, john.rigby@linaro.org Subject: [PATCH 02/22] omap: add miscellaneous utility macros for bit-field operations Date: Mon, 28 Feb 2011 17:16:11 +0530 Message-Id: <1298893591-17636-3-git-send-email-aneesh@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1298893591-17636-1-git-send-email-aneesh@ti.com> References: <1298893591-17636-1-git-send-email-aneesh@ti.com> Signed-off-by: Aneesh V --- arch/arm/include/asm/omap_common.h | 51 ++++++++++++++++++++++++++++++++++++ 1 files changed, 51 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/omap_common.h diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h new file mode 100644 index 0000000..03db2f5 --- /dev/null +++ b/arch/arm/include/asm/omap_common.h @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, + * + * Aneesh V + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _OMAP_COMMON_H_ +#define _OMAP_COMMON_H_ + +/* extract a bit field from a bit vector */ +#define get_bit_field(nr, start, mask)\ + (((nr) & (mask)) >> (start)) + +/* Set a field in a bit vector */ +#define set_bit_field(nr, start, mask, val)\ + do { \ + (nr) = ((nr) & ~(mask)) | (((val) << (start)) & (mask));\ + } while (0); + +/* + * Utility macro for read-modify-write of a hardware register + * addr - address of the register + * shift - starting bit position of the field to be modified + * msk - mask for the field + * val - value to be shifted masked and written to the field + */ +#define modify_reg_32(addr, shift, msk, val) \ + do {\ + writel(((readl(addr) & ~(msk))|(((val) << (shift)) & (msk))),\ + (addr));\ + } while (0); + +#endif /* _OMAP_COMMON_H_ */