Show patches with: Submitter = Sagar Shrikant Kadam       |    Archived = No       |   48 patches
Patch Series S/W/F Date Submitter Delegate State
[v3,5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC add DM based reset driver for SiFive SoC's --- 2020-07-10 Sagar Shrikant Kadam Superseded
[v3,4/5] sifive: reset: add DM based reset driver for SiFive SoC's add DM based reset driver for SiFive SoC's --- 2020-07-10 Sagar Shrikant Kadam Superseded
[v3,3/5] fu540: dtsi: add reset producer and consumer entries add DM based reset driver for SiFive SoC's --- 2020-07-10 Sagar Shrikant Kadam Accepted
[v3,2/5] fu540: prci: use common reset indexes defined in binding header add DM based reset driver for SiFive SoC's --- 2020-07-10 Sagar Shrikant Kadam Accepted
[v3,1/5] dt-bindings: prci: add indexes for reset signals available in prci add DM based reset driver for SiFive SoC's --- 2020-07-10 Sagar Shrikant Kadam Accepted
[v7,4/4] riscv: cpu: check and append L1 cache to cpu features update clock handler and proper cpu features --- 2020-06-28 Sagar Shrikant Kadam Accepted
[v7,3/4] riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit update clock handler and proper cpu features --- 2020-06-28 Sagar Shrikant Kadam Accepted
[v7,2/4] uclass: cpu: fix to display proper CPU features update clock handler and proper cpu features --- 2020-06-28 Sagar Shrikant Kadam Accepted
[v7,1/4] riscv: dts: hifive-unleashed-a00: add cpu aliases update clock handler and proper cpu features --- 2020-06-28 Sagar Shrikant Kadam Superseded
[v6,4/4] riscv: cpu: check and append L1 cache to cpu features update clock handler and proper cpu features --- 2020-06-26 Sagar Shrikant Kadam Superseded
[v6,3/4] riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit update clock handler and proper cpu features --- 2020-06-26 Sagar Shrikant Kadam Superseded
[v6,2/4] uclass: cpu: fix to display proper CPU features update clock handler and proper cpu features --- 2020-06-26 Sagar Shrikant Kadam New
[v6,1/4] riscv: dts: hifive-unleashed-a00: add cpu aliases update clock handler and proper cpu features --- 2020-06-26 Sagar Shrikant Kadam Superseded
[v2,5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC add DM based reset driver for SiFive SoC's --- 2020-06-25 Sagar Shrikant Kadam New
[v2,4/5] sifive: reset: add DM based reset driver for SiFive SoC's add DM based reset driver for SiFive SoC's --- 2020-06-25 Sagar Shrikant Kadam Accepted
[v2,3/5] fu540: dtsi: add reset producer and consumer entries add DM based reset driver for SiFive SoC's --- 2020-06-25 Sagar Shrikant Kadam New
[v2,2/5] fu540: prci: use common reset indexes defined in binding header add DM based reset driver for SiFive SoC's --- 2020-06-25 Sagar Shrikant Kadam New
[v2,1/5] dt-bindings: prci: add indexes for reset signals available in prci add DM based reset driver for SiFive SoC's --- 2020-06-25 Sagar Shrikant Kadam New
[5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC add DM based reset driver for SiFive SoC's --- 2020-06-22 Sagar Shrikant Kadam Superseded
[4/5] sifive: reset: add DM based reset driver for SiFive SoC's add DM based reset driver for SiFive SoC's --- 2020-06-22 Sagar Shrikant Kadam Superseded
[3/5] fu540: dtsi: add reset producer and consumer entries add DM based reset driver for SiFive SoC's --- 2020-06-22 Sagar Shrikant Kadam Superseded
[2/5] fu540: prci: use common reset indexes defined in binding header add DM based reset driver for SiFive SoC's --- 2020-06-22 Sagar Shrikant Kadam Superseded
[1/5] dt-bindings: prci: add indexes for reset signals available in prci add DM based reset driver for SiFive SoC's --- 2020-06-22 Sagar Shrikant Kadam Superseded
[v4,4/4] riscv: cpu: check and append L1 cache to cpu features update clock handler and proper cpu features --- 2020-06-21 Sagar Shrikant Kadam Superseded
[v4,3/4] riscv: cpu: fixes to display proper CPU features update clock handler and proper cpu features --- 2020-06-21 Sagar Shrikant Kadam Superseded
[v4,2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases update clock handler and proper cpu features --- 2020-06-21 Sagar Shrikant Kadam Superseded
[v4,1/4] fu540: prci: add request and free clock handlers update clock handler and proper cpu features --- 2020-06-21 Sagar Shrikant Kadam New
[v3,4/4] riscv: cpu: check and append L1 cache to cpu features update clock handler and proper cpu features --- 2020-06-04 Sagar Shrikant Kadam Superseded
[v3,3/4] riscv: cpu: fixes to display proper CPU features update clock handler and proper cpu features --- 2020-06-04 Sagar Shrikant Kadam Superseded
[v3,2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases update clock handler and proper cpu features --- 2020-06-04 Sagar Shrikant Kadam Superseded
[v3,1/4] fu540: prci: add request and free clock handlers update clock handler and proper cpu features --- 2020-06-04 Sagar Shrikant Kadam Superseded
[v2,4/4] riscv: cpu: check and append L1 cache to cpu features update clock handler and proper cpu features --- 2020-05-26 Sagar Shrikant Kadam New
[v2,3/4] riscv: cpu: fixes to display proper CPU features update clock handler and proper cpu features --- 2020-05-26 Sagar Shrikant Kadam New
[v2,2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases update clock handler and proper cpu features --- 2020-05-26 Sagar Shrikant Kadam Accepted
[v2,1/4] fu540: prci: add request and free clock handlers update clock handler and proper cpu features --- 2020-05-26 Sagar Shrikant Kadam New
[v1,2/2] cpu: clk: riscv: populate proper CPU core clk frequency display proper CPU frequency on hifive-unleashed --- 2020-02-18 Sagar Shrikant Kadam New
[v1,1/2] fu540: prci: add request and free clock handlers display proper CPU frequency on hifive-unleashed --- 2020-02-18 Sagar Shrikant Kadam Superseded
[v2,4/4] bdinfo: fu540: print fdt base address for debugging Fix currently available support for flash on HiFive Unleashed --- 2020-01-28 Sagar Shrikant Kadam New
[v2,3/4] dts: u-boot.dtsi: override flash tx-rx width Fix currently available support for flash on HiFive Unleashed --- 2020-01-28 Sagar Shrikant Kadam New
[v2,2/4] spi: fu540: add claim and release method to spi-sifive.c Fix currently available support for flash on HiFive Unleashed --- 2020-01-28 Sagar Shrikant Kadam New
[v2,1/4] fu540: dtsi: spi: add num-cs info to device tree Fix currently available support for flash on HiFive Unleashed --- 2020-01-28 Sagar Shrikant Kadam New
[v1,7/7] fu540: spi-nor: modify the flash read and program opcodes Fix currently available support for flash on HiFive Unleashed --- 2020-01-23 Sagar Shrikant Kadam New
[v1,6/7] nor: add post bfpt fix handler for is25wp256 device Fix currently available support for flash on HiFive Unleashed --- 2020-01-23 Sagar Shrikant Kadam New
[v1,5/7] spi: fu540: fix: use spi xfer bitlen for spi transfer Fix currently available support for flash on HiFive Unleashed --- 2020-01-23 Sagar Shrikant Kadam New
[v1,4/7] spi: fu540: add claim and release method to spi-sifive.c Fix currently available support for flash on HiFive Unleashed --- 2020-01-23 Sagar Shrikant Kadam Superseded
[v1,3/7] fu540: dtsi: spi: add num-cs info to dt Fix currently available support for flash on HiFive Unleashed --- 2020-01-23 Sagar Shrikant Kadam Superseded
[v1,2/7] bdinfo: fu540: print fdt descriptor base for debug Fix currently available support for flash on HiFive Unleashed --- 2020-01-23 Sagar Shrikant Kadam Superseded
[v1,1/7] riscv: dts: include -u-boot for dtb Fix currently available support for flash on HiFive Unleashed --- 2020-01-23 Sagar Shrikant Kadam New