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Show patches with
: Submitter =
Pragnesh Patel
| Archived =
No
| 216 patches
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Submitter
State
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New
Under Review
Accepted
Rejected
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Archived
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Delegate
------
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andy.doan@linaro.org
andy.doan@linaro.org
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«
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[v9,01/18] misc: add driver for the SiFive otp controller
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-13
Pragnesh Patel
Superseded
[v8,21/21] doc: sifive: fu540: Add description for OpenSBI generic platform
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,20/21] riscv: sifive: fu540: enable all cache ways from U-Boot proper
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,19/21] sifive: dts: fu540: Enable L2 Cache in U-Boot
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
New
[v8,18/21] configs: fu540: Add config options for U-Boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,17/21] sifive: fu540: Add U-Boot proper sector start
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,16/21] sifive: fu540: Add sample SD gpt partition layout
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,15/21] riscv: sifive: fu540: add SPL configuration
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,14/21] riscv: Add place-holder for driver compilation
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
New
[v8,13/21] riscv: cpu: fu540: Add support for cpu fu540
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
New
[v8,12/21] riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,11/21] clk: sifive: fu540-prci: Add ehternet clock initialization in SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
New
[v8,10/21] clk: sifive: fu540-prci: Add ddr clock initialization in SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,09/21] clk: sifive: fu540-prci: Add clock enable and disable ops
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,08/21] riscv: sifive: dts: fu540: add U-Boot dmc node
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,07/21] sifive: dts: fu540: Add DDR controller and phy register settings
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,06/21] sifive: fu540: add ddr driver
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,05/21] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,04/21] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,03/21] riscv: Add _image_binary_end for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,02/21] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v8,01/21] misc: add driver for the SiFive otp controller
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-09
Pragnesh Patel
Superseded
[v7,22/22] doc: sifive: fu540: Add description for RISC-V FU540 U-Boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,21/22] doc: sifive: fu540: Add description for OpenSBI generic platform
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,20/22] riscv: sifive: fu540: enable all cache ways from U-Boot proper
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,19/22] sifive: dts: fu540: Enable L2 Cache in U-Boot
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,18/22] configs: fu540: Add config options for U-Boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,17/22] riscv: sifive: fu540: add SPL configuration
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,16/22] riscv: Enable cpu clock if it is present
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,15/22] riscv: sifive: dts: fu540: Add clock for cpus node
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,14/22] riscv: Add place-holder for driver compilation
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,13/22] riscv: cpu: fu540: Add support for cpu fu540
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,12/22] sifive: dts: fu540: Enable gpio in U-Boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,11/22] riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,10/22] clk: sifive: fu540-prci: ddr and ethernet clock initialization in SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,09/22] clk: sifive: fu540-prci: Add clock enable and disable ops
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,08/22] riscv: sifive: dts: fu540: add U-Boot dmc node
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,07/22] sifive: dts: fu540: Add DDR controller and phy register settings
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,06/22] sifive: fu540: add ddr driver
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,05/22] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,04/22] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
New
[v7,03/22] riscv: Add _image_binary_end for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,02/22] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
[v7,01/22] misc: add driver for the SiFive otp controller
RISC-V SiFive FU540 support SPL
-
-
-
2020-05-02
Pragnesh Patel
Superseded
sifive: fix palmer's email address
sifive: fix palmer's email address
-
-
-
2020-04-30
Pragnesh Patel
Superseded
[v6,17/17] doc: update FU540 RISC-V documentation
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
New
[v6,16/17] sifive: fix palmer's email address
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Accepted
[v6,15/17] riscv: sifive: fu540: enable all cache ways from u-boot proper
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
New
[v6,14/17] sifive: dts: fu540: Enable L2 Cache in U-Boot
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,13/17] configs: fu540: Add config options for U-Boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
New
[v6,12/17] riscv: sifive: fu540: add SPL configuration
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
New
[v6,11/17] sifive: dts: fu540: Enable gpio in U-Boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,10/17] riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,09/17] clk: sifive: fu540-prci: Add clock initialization for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
New
[v6,08/17] clk: sifive: fu540-prci: Add clock enable and disable ops
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,07/17] sifive: dts: fu540: Add DDR controller and phy register settings
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,06/17] sifive: fu540: add ddr driver
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,05/17] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
New
[v6,04/17] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,03/17] riscv: Add _image_binary_end for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,02/17] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[v6,01/17] misc: add driver for the SiFive otp controller
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-29
Pragnesh Patel
Superseded
[RFC,v2] cmd: mp: change the command name from cpu to mp
[RFC,v2] cmd: mp: change the command name from cpu to mp
-
-
-
2020-03-14
Pragnesh Patel
New
[RFC,v2] cmd: mp: change the command name from cpu to mp
[RFC,v2] cmd: mp: change the command name from cpu to mp
-
-
-
2020-03-14
Pragnesh Patel
Superseded
[v2] riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
[v2] riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
-
-
-
2020-03-14
Pragnesh Patel
Accepted
[RFC] cmd: mp: change the command name from cpu to mp
[RFC] cmd: mp: change the command name from cpu to mp
-
-
-
2020-03-14
Pragnesh Patel
Superseded
[v2] riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
[v2] riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
-
-
-
2020-03-14
Pragnesh Patel
Superseded
riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
-
-
-
2020-03-14
Pragnesh Patel
Superseded
[v5,14/14] doc: update FU540 RISC-V documentation
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
Superseded
[v5,13/14] sifive: fix palmer's email address
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
Superseded
[v5,12/14] riscv: sifive: fu540: enable all cache ways from u-boot proper
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v5,11/14] configs: fu540: Add config options for U-boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
Superseded
[v5,10/14] riscv: sifive: fu540: add SPL configuration
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v5,09/14] clk: sifive: fu540-prci: Add clock initialization for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v5,08/14] clk: sifive: fu540-prci: Add clock enable and disable ops
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v5,07/14] sifive: dts: fu540: Add DDR controller and phy register settings
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
Superseded
[v5,06/14] sifive: fu540: add ddr driver
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v5,05/14] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v5,04/14] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v5,03/14] riscv: Add _image_binary_end for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
Superseded
[v5,02/14] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
Superseded
[v5,01/14] misc: add driver for the SiFive otp controller
RISC-V SiFive FU540 support SPL
-
-
-
2020-03-11
Pragnesh Patel
New
[v4,14/14] doc: update FU540 RISC-V documentation
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,13/14] sifive: fix palmer's email address
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,12/14] riscv: sifive: fu540: enable all cache ways from u-boot proper
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,11/14] configs: fu540: Add config options for U-boot SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,10/14] riscv: sifive: fu540: add SPL configuration
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
New
[v4,09/14] clk: sifive: fu540-prci: Add clock initialization for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,08/14] clk: sifive: fu540-prci: Add clock enable and disable ops
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,07/14] sifive: dts: fu540: Add DDR controller and phy register settings
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,06/14] sifive: fu540: add ddr driver
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,05/14] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,04/14] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,03/14] riscv: Add _image_binary_end for SPL
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
[v4,02/14] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
New
[v4,01/14] misc: add driver for the SiFive otp controller
RISC-V SiFive FU540 support SPL
-
-
-
2020-02-24
Pragnesh Patel
Superseded
Add CONFIG_OF_SEPARATE in sifive_fu540_defconfig
Add CONFIG_OF_SEPARATE in sifive_fu540_defconfig
-
-
-
2020-02-11
Pragnesh Patel
New
[v3,10/10] doc: update FU540 RISC-V documentation
RISC-V SiFive FU540 support SPL
-
-
-
2020-01-24
Pragnesh Patel
New
[v3,09/10] sifive: fix palmer's email address and add sifive_fu540_spl_defconfig
RISC-V SiFive FU540 support SPL
-
-
-
2020-01-24
Pragnesh Patel
New
[v3,08/10] riscv: sifive: fu540: enable all cache ways from u-boot proper
RISC-V SiFive FU540 support SPL
-
-
-
2020-01-24
Pragnesh Patel
New
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