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RISC-V SiFive FU540 support SPL
| 22 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[v7,22/22] doc: sifive: fu540: Add description for RISC-V FU540 U-Boot SPL
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,21/22] doc: sifive: fu540: Add description for OpenSBI generic platform
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,20/22] riscv: sifive: fu540: enable all cache ways from U-Boot proper
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,19/22] sifive: dts: fu540: Enable L2 Cache in U-Boot
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,18/22] configs: fu540: Add config options for U-Boot SPL
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,17/22] riscv: sifive: fu540: add SPL configuration
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,16/22] riscv: Enable cpu clock if it is present
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,15/22] riscv: sifive: dts: fu540: Add clock for cpus node
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,14/22] riscv: Add place-holder for driver compilation
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,13/22] riscv: cpu: fu540: Add support for cpu fu540
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,12/22] sifive: dts: fu540: Enable gpio in U-Boot SPL
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,11/22] riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,10/22] clk: sifive: fu540-prci: ddr and ethernet clock initialization in SPL
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,09/22] clk: sifive: fu540-prci: Add clock enable and disable ops
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,08/22] riscv: sifive: dts: fu540: add U-Boot dmc node
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,07/22] sifive: dts: fu540: Add DDR controller and phy register settings
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,06/22] sifive: fu540: add ddr driver
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,05/22] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,04/22] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
New
[v7,03/22] riscv: Add _image_binary_end for SPL
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,02/22] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded
[v7,01/22] misc: add driver for the SiFive otp controller
RISC-V SiFive FU540 support SPL
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2020-05-02
Pragnesh Patel
Superseded