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[206.248.184.2]) by smtp.gmail.com with ESMTPSA id fi19-20020a0562141a5300b0061b608dc4c1sm3379399qvb.94.2023.05.12.18.37.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 May 2023 18:37:04 -0700 (PDT) From: Ralph Siemsen To: u-boot@lists.denx.de Cc: Marek Vasut , Ralph Siemsen , Adam Ford , Andrew Davis , Angus Ainslie , Aswath Govindraju , Bryan Brattlof , Chris Packham , Emil Renner Berthing , Fabio Estevam , Gowtham Tammana , Hai Pham , Heiko Thiery , Heinrich Schuchardt , Jagan Teki , Jianlong Huang , Jim Liu , Kever Yang , Kuan Lim Lee , LUU HOAI , Lukasz Majewski , Marc Kleine-Budde , Marek Vasut , Marek Vasut , Massimo Pegorer , Mattijs Korpershoek , Max Krummenacher , Nishanth Menon , Nobuhiro Iwamatsu , =?utf-8?q?Pali_Roh=C3=A1r?= , Phong Hoang , Roman Kopytin , Safae Ouajih , Sean Anderson , Sebastian Krzyszkowiak , Simon Glass , Steven Lawrance , Sughosh Ganu , Suman Anna , Takeshi Kihara , Tim Harvey , Weijie Gao , Yanhong Wang Subject: [PATCH v7 00/10] Renesas RZ/N1 SoC initial support Date: Fri, 12 May 2023 21:36:48 -0400 Message-Id: <20230513013658.2330651-1-ralph.siemsen@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Mailman-Approved-At: Sat, 13 May 2023 10:59:35 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The RZ/N1 is a family of SoC devices from Renesas [1], featuring ARM Cortex-A7 and/or Cortex-M3 CPU, industrial ethernet protocols, integrated Ethernet switch, and numerous peripherals. This is a first step in upstreaming support for the RZ/N1 family. Currently it contains just enough to boot to the u-boot prompt. Additional patches will follow to support flash, SD, USB, Ethernet, etc. This work is based on a vendor-supplied u-boot 2017.01 tree [2], which supports several eval boards, none of which I have access to. Instead development has been done on a Schneider RZN1 board, which is fairly similar to the Renesas RZ/N1D-DB Demo board. [1] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzn1 [2] https://github.com/renesas-rz/rzn1_u-boot/tree/rzn1-stable Changes in v7: - fix htmldocs warning - fix breakage of "dumpimage -l" - revert back to static allocation for config file data Changes in v6: - rebase to u-boot v2023.07-rc2 - add R-b tags Changes in v5: - rebase to u-boot v2023.04-1037-gb646e1f69f - many small changes in response to reviewer comments - move rzn1 into mach-rmobile (similar to existing rza1) - move board-specific DDR init to board dir Changes in v4: - rebase to u-boot v2023.04-rc3 - remove RFC prefix - cc entire series to Marek by request - clock tables synced with linux (pending patches) - documentation and comment improvements Changes in v3: - many tweaks to clock driver based on reviewer feedback - rebased to u-boot v2023.04-rc2 - reviewer suggestions added to spkgimage.c - many small cleanups, checkpatch, FIXMEs resolved Changes in v2: - rewrote the stand-alone spkg_utility to integrate into mkimage Ralph Siemsen (10): ARM: armv7: add non-SPL enable for Cortex SMPEN clk: renesas: prepare for non R-Car clock drivers clk: renesas: add R906G032 driver pinctrl: renesas: add R906G032 driver ram: cadence: add driver for Cadence EDAC ARM: dts: add devicetree for Renesas RZ/N1 SoC ARM: rmobile: Add support for Renesas RZ/N1 SoC board: schneider: add RZN1 board support tools: spkgimage: add Renesas SPKG format doc: renesas: add Renesas board docs arch/arm/cpu/armv7/Kconfig | 5 + arch/arm/dts/r9a06g032-ddr.dtsi | 512 ++++++++ arch/arm/dts/r9a06g032-rzn1-snarc-u-boot.dtsi | 23 + arch/arm/dts/r9a06g032-rzn1-snarc.dts | 92 ++ arch/arm/dts/r9a06g032.dtsi | 477 +++++++ arch/arm/mach-rmobile/Kconfig | 19 + arch/arm/mach-rmobile/Kconfig.rzn1 | 20 + arch/arm/mach-rmobile/cpu_info.c | 10 +- board/schneider/rzn1-snarc/Kconfig | 18 + board/schneider/rzn1-snarc/Makefile | 3 + board/schneider/rzn1-snarc/rzn1.c | 31 + board/schneider/rzn1-snarc/spkgimage.cfg | 26 + boot/image.c | 1 + configs/rzn1_snarc_defconfig | 24 + doc/board/index.rst | 1 + doc/board/renesas/index.rst | 10 + doc/board/renesas/renesas.rst | 45 + doc/board/renesas/rzn1.rst | 76 ++ doc/mkimage.1 | 45 + drivers/clk/renesas/Kconfig | 15 +- drivers/clk/renesas/Makefile | 3 +- drivers/clk/renesas/r9a06g032-clocks.c | 1103 +++++++++++++++++ drivers/pinctrl/Makefile | 1 + drivers/pinctrl/renesas/Kconfig | 7 + drivers/pinctrl/renesas/Makefile | 1 + drivers/pinctrl/renesas/pinctrl-rzn1.c | 379 ++++++ drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 3 + drivers/ram/cadence/Kconfig | 12 + drivers/ram/cadence/Makefile | 1 + drivers/ram/cadence/ddr_ctrl.c | 414 +++++++ drivers/ram/renesas/Makefile | 3 + drivers/ram/renesas/rzn1/Makefile | 3 + drivers/ram/renesas/rzn1/ddr_async.c | 376 ++++++ include/configs/rzn1-snarc.h | 13 + include/dt-bindings/clock/r9a06g032-sysctrl.h | 149 +++ include/dt-bindings/pinctrl/rzn1-pinctrl.h | 141 +++ include/image.h | 1 + include/renesas/ddr_ctrl.h | 175 +++ include/renesas/is43tr16256a_125k_CTL.h | 419 +++++++ .../renesas/jedec_ddr3_2g_x16_1333h_500_cl8.h | 399 ++++++ tools/Makefile | 1 + tools/renesas_spkgimage.c | 336 +++++ tools/renesas_spkgimage.h | 87 ++ 44 files changed, 5477 insertions(+), 4 deletions(-) create mode 100644 arch/arm/dts/r9a06g032-ddr.dtsi create mode 100644 arch/arm/dts/r9a06g032-rzn1-snarc-u-boot.dtsi create mode 100644 arch/arm/dts/r9a06g032-rzn1-snarc.dts create mode 100644 arch/arm/dts/r9a06g032.dtsi create mode 100644 arch/arm/mach-rmobile/Kconfig.rzn1 create mode 100644 board/schneider/rzn1-snarc/Kconfig create mode 100644 board/schneider/rzn1-snarc/Makefile create mode 100644 board/schneider/rzn1-snarc/rzn1.c create mode 100644 board/schneider/rzn1-snarc/spkgimage.cfg create mode 100644 configs/rzn1_snarc_defconfig create mode 100644 doc/board/renesas/index.rst create mode 100644 doc/board/renesas/renesas.rst create mode 100644 doc/board/renesas/rzn1.rst create mode 100644 drivers/clk/renesas/r9a06g032-clocks.c create mode 100644 drivers/pinctrl/renesas/pinctrl-rzn1.c create mode 100644 drivers/ram/cadence/Kconfig create mode 100644 drivers/ram/cadence/Makefile create mode 100644 drivers/ram/cadence/ddr_ctrl.c create mode 100644 drivers/ram/renesas/Makefile create mode 100644 drivers/ram/renesas/rzn1/Makefile create mode 100644 drivers/ram/renesas/rzn1/ddr_async.c create mode 100644 include/configs/rzn1-snarc.h create mode 100644 include/dt-bindings/clock/r9a06g032-sysctrl.h create mode 100644 include/dt-bindings/pinctrl/rzn1-pinctrl.h create mode 100644 include/renesas/ddr_ctrl.h create mode 100644 include/renesas/is43tr16256a_125k_CTL.h create mode 100644 include/renesas/jedec_ddr3_2g_x16_1333h_500_cl8.h create mode 100644 tools/renesas_spkgimage.c create mode 100644 tools/renesas_spkgimage.h