[v1,00/10] mips: Add initial Octeon MIPS64 base support

This patch adds very basic support for the Octeon III SoCs. Only CFI
parallel UART, reset and NOR flash are supported for now.

Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches later.
To still use U-Boot on with this port, the L2 cache (4MiB on Octeon III
CN73xx) is used as RAM. This way, U-Boot can boot to the prompt on such
boards.

Thanks,
Stefan


Aaron Williams (2):
  mips: octeon: Initial minimal support for the Marvell Octeon SoC
  mips: mipsregs.h: Add more register macros for Octeon port

Stefan Roese (8):
  mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM
  mips: cache: Don't use cache operations with
    CONFIG_MIPS_CACHE_COHERENT
  mips: traps: Set WG bit in EBase register on Octeon
  mips: Rename CONFIG_CPU_CAVIUM_OCTEON to CONFIG_CPU_MIPS64_OCTEON
  mips: mipsregs.h: Sync with linux v5.7.0-rc3 version
  sysreset: Add Octeon sysreset driver
  mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file
  mips: octeon: Add minimal Octeon 3 EBB7304 EVK support

 MAINTAINERS                                  |    7 +
 arch/Kconfig                                 |    1 +
 arch/mips/Kconfig                            |   49 +-
 arch/mips/Makefile                           |    7 +
 arch/mips/cpu/Makefile                       |    4 +-
 arch/mips/dts/Makefile                       |    1 +
 arch/mips/dts/mrvl,cn73xx.dtsi               |   64 +
 arch/mips/dts/mrvl,octeon-ebb7304.dts        |   96 ++
 arch/mips/include/asm/arch-octeon/cavm-reg.h |   42 +
 arch/mips/include/asm/arch-octeon/clock.h    |   24 +
 arch/mips/include/asm/io.h                   |    4 +-
 arch/mips/include/asm/mipsregs.h             |   63 +-
 arch/mips/include/asm/ptrace.h               |    2 +-
 arch/mips/lib/cache.c                        |   51 +-
 arch/mips/lib/traps.c                        |    4 +
 arch/mips/mach-octeon/Kconfig                |  106 ++
 arch/mips/mach-octeon/Makefile               |   10 +
 arch/mips/mach-octeon/clock.c                |   22 +
 arch/mips/mach-octeon/cpu.c                  |   55 +
 arch/mips/mach-octeon/dram.c                 |   27 +
 arch/mips/mach-octeon/include/ioremap.h      |   30 +
 arch/mips/mach-octeon/start.S                | 1241 ++++++++++++++++++
 board/Marvell/octeon_ebb7304/Kconfig         |   19 +
 board/Marvell/octeon_ebb7304/MAINTAINERS     |    7 +
 board/Marvell/octeon_ebb7304/Makefile        |    8 +
 board/Marvell/octeon_ebb7304/board.c         |   12 +
 configs/octeon_ebb7304_defconfig             |   34 +
 drivers/sysreset/Kconfig                     |    7 +
 drivers/sysreset/Makefile                    |    1 +
 drivers/sysreset/sysreset_octeon.c           |   52 +
 include/configs/octeon_common.h              |   29 +
 include/configs/octeon_ebb7304.h             |   20 +
 scripts/config_whitelist.txt                 |    1 -
 33 files changed, 2066 insertions(+), 34 deletions(-)
 create mode 100644 arch/mips/dts/mrvl,cn73xx.dtsi
 create mode 100644 arch/mips/dts/mrvl,octeon-ebb7304.dts
 create mode 100644 arch/mips/include/asm/arch-octeon/cavm-reg.h
 create mode 100644 arch/mips/include/asm/arch-octeon/clock.h
 create mode 100644 arch/mips/mach-octeon/Kconfig
 create mode 100644 arch/mips/mach-octeon/Makefile
 create mode 100644 arch/mips/mach-octeon/clock.c
 create mode 100644 arch/mips/mach-octeon/cpu.c
 create mode 100644 arch/mips/mach-octeon/dram.c
 create mode 100644 arch/mips/mach-octeon/include/ioremap.h
 create mode 100644 arch/mips/mach-octeon/start.S
 create mode 100644 board/Marvell/octeon_ebb7304/Kconfig
 create mode 100644 board/Marvell/octeon_ebb7304/MAINTAINERS
 create mode 100644 board/Marvell/octeon_ebb7304/Makefile
 create mode 100644 board/Marvell/octeon_ebb7304/board.c
 create mode 100644 configs/octeon_ebb7304_defconfig
 create mode 100644 drivers/sysreset/sysreset_octeon.c
 create mode 100644 include/configs/octeon_common.h
 create mode 100644 include/configs/octeon_ebb7304.h