| Message ID | 20200224083247.29086-1-pragnesh.patel@sifive.com |
|---|---|
| Headers | show |
| Series | RISC-V SiFive FU540 support SPL | expand |
On Mon, 24 Feb 2020 00:32:32 PST (-0800), pragnesh.patel at sifive.com wrote: > This series add support for SPL to FU540.U-Boot SPL can boot from > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and > U-Boot proper from MMC devices. > > How to test this patch: > 1) Go to OpenSBI-dir : make PLATFORM=sifive/fu540 O=build_dir I=install_dir FW_DYNAMIC=y install > 2) cp install_dir/platform/sifive/fu540/firmware/fw_dynamic.bin <u-boot-dir>/ > 3) Change to u-boot-dir > 4) make sifive_fu540_defconfig > 5) make all > 6) ZSBL loads the U-boot SPL(u-boot-spl.bin) from a partition with > GUID type 5B193300-FC78-40CD-8002-E86C45580B47 > > sudo dd if=spl/u-boot-spl.bin of=/dev/sdc4 bs=1M > > 7) U-boot SPL expects a u-boot FIT image(u-boot.itb) from 1st partition(/dev/sdc1) > of SD card irrespective of GUID > > sudo dd if=u-boot.itb of=/dev/sdc1 bs=1M > > Thanks to Yash Shah <yash.shah at sifive.com> for testing the series. > > Changes in v4: > - Split misc DM driver patch into multiple patches > - Added new SPL_CRC7_SUPPORT Kconfig option > - Added DM driver for DDR > - Added clk_enable and clk_disable ops in SiFive PRCI driver > - Added early clock initialization for SPL in SiFive PRCI driver > - Added SPL config options in sifive_fu540_defconfig instead of > creatiing a new config file for SPL > - Update fu540.rst on how to build and flash U-boot SPL > > Changes in v3: > - Remove arch-fu540 and arch-sifive from arch/riscv/include/asm/ > - Split SPL patches into DDR and SPL and spl defconfig > - Update fu540/MAINTAINERS file > - Update fu540.rst on how to build and flash U-boot SPL > > Changes in v2: > - Add DM driver Sifive OTP > - Split SPL patches into multiple patches > - Add a seprate patch for _image_binary_end and crc7.c > - Add a seprate patch to add board -u-boot.dtsi files > - Update FU540 RISC-V documentation > > > Pragnesh Patel (14): > misc: add driver for the SiFive otp controller > riscv: sifive: fu540: Use OTP DM driver for serial environment > variable > riscv: Add _image_binary_end for SPL > lib: Makefile: build crc7.c when CONFIG_MMC_SPI > riscv: sifive: dts: fu540: Add board -u-boot.dtsi files > sifive: fu540: add ddr driver > sifive: dts: fu540: Add DDR controller and phy register settings > clk: sifive: fu540-prci: Add clock enable and disable ops > clk: sifive: fu540-prci: Add clock initialization for SPL > riscv: sifive: fu540: add SPL configuration > configs: fu540: Add config options for U-boot SPL > riscv: sifive: fu540: enable all cache ways from u-boot proper > sifive: fix palmer's email address > doc: update FU540 RISC-V documentation Thanks for doing this. I don't see any responses here and I'm afraid I'm not even remotely familiar with u-boot development, but I took a look and don't see any issues aside from what I replied to. > > arch/riscv/cpu/u-boot-spl.lds | 1 + > arch/riscv/dts/fu540-c000-u-boot.dtsi | 63 + > arch/riscv/dts/fu540-sdram-lpddr4.dtsi | 1489 +++++++++++++++++ > .../dts/hifive-unleashed-a00-u-boot.dtsi | 23 + > board/sifive/fu540/Kconfig | 10 + > board/sifive/fu540/MAINTAINERS | 2 +- > board/sifive/fu540/Makefile | 5 + > board/sifive/fu540/cache.c | 20 + > board/sifive/fu540/cache.h | 13 + > board/sifive/fu540/fu540-memory-map.h | 33 + > board/sifive/fu540/fu540.c | 139 +- > board/sifive/fu540/spl.c | 78 + > board/sifive/fu540/ux00prci.h | 56 + > common/spl/Kconfig | 7 + > configs/sifive_fu540_defconfig | 11 + > doc/board/sifive/fu540.rst | 409 ++++- > drivers/clk/sifive/fu540-prci.c | 169 +- > drivers/misc/Kconfig | 7 + > drivers/misc/Makefile | 1 + > drivers/misc/sifive-otp.c | 241 +++ > drivers/ram/Kconfig | 7 + > drivers/ram/Makefile | 2 + > drivers/ram/sifive/Kconfig | 8 + > drivers/ram/sifive/Makefile | 6 + > drivers/ram/sifive/sdram_fu540.c | 295 ++++ > drivers/ram/sifive/sdram_fu540.h | 94 ++ > include/configs/sifive-fu540.h | 18 + > lib/Makefile | 1 + > 28 files changed, 3107 insertions(+), 101 deletions(-) > create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi > create mode 100644 arch/riscv/dts/fu540-sdram-lpddr4.dtsi > create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi > create mode 100644 board/sifive/fu540/cache.c > create mode 100644 board/sifive/fu540/cache.h > create mode 100644 board/sifive/fu540/fu540-memory-map.h > create mode 100644 board/sifive/fu540/spl.c > create mode 100644 board/sifive/fu540/ux00prci.h > create mode 100644 drivers/misc/sifive-otp.c > create mode 100644 drivers/ram/sifive/Kconfig > create mode 100644 drivers/ram/sifive/Makefile > create mode 100644 drivers/ram/sifive/sdram_fu540.c > create mode 100644 drivers/ram/sifive/sdram_fu540.h
Hi, >-----Original Message----- >From: Palmer Dabbelt <palmerdabbelt at google.com> >Sent: 06 March 2020 22:32 >To: Pragnesh Patel <pragnesh.patel at sifive.com> >Cc: u-boot at lists.denx.de; Atish Patra <Atish.Patra at wdc.com>; >bmeng.cn at gmail.com; Paul Walmsley <paul.walmsley at sifive.com>; >jagan at amarulasolutions.com; Troy Benjegerdes ><troy.benjegerdes at sifive.com>; Anup Patel <Anup.Patel at wdc.com>; Sagar >Kadam <sagar.kadam at sifive.com>; Pragnesh Patel ><pragnesh.patel at sifive.com> >Subject: Re: [PATCH v4 00/14] RISC-V SiFive FU540 support SPL > >On Mon, 24 Feb 2020 00:32:32 PST (-0800), pragnesh.patel at sifive.com wrote: >> This series add support for SPL to FU540.U-Boot SPL can boot from >> L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and >> U-Boot proper from MMC devices. >> >> How to test this patch: >> 1) Go to OpenSBI-dir : make PLATFORM=sifive/fu540 O=build_dir >> I=install_dir FW_DYNAMIC=y install >> 2) cp install_dir/platform/sifive/fu540/firmware/fw_dynamic.bin >> <u-boot-dir>/ >> 3) Change to u-boot-dir >> 4) make sifive_fu540_defconfig >> 5) make all >> 6) ZSBL loads the U-boot SPL(u-boot-spl.bin) from a partition with >> GUID type 5B193300-FC78-40CD-8002-E86C45580B47 >> >> sudo dd if=spl/u-boot-spl.bin of=/dev/sdc4 bs=1M >> >> 7) U-boot SPL expects a u-boot FIT image(u-boot.itb) from 1st >partition(/dev/sdc1) >> of SD card irrespective of GUID >> >> sudo dd if=u-boot.itb of=/dev/sdc1 bs=1M >> >> Thanks to Yash Shah <yash.shah at sifive.com> for testing the series. >> >> Changes in v4: >> - Split misc DM driver patch into multiple patches >> - Added new SPL_CRC7_SUPPORT Kconfig option >> - Added DM driver for DDR >> - Added clk_enable and clk_disable ops in SiFive PRCI driver >> - Added early clock initialization for SPL in SiFive PRCI driver >> - Added SPL config options in sifive_fu540_defconfig instead of >> creatiing a new config file for SPL >> - Update fu540.rst on how to build and flash U-boot SPL >> >> Changes in v3: >> - Remove arch-fu540 and arch-sifive from arch/riscv/include/asm/ >> - Split SPL patches into DDR and SPL and spl defconfig >> - Update fu540/MAINTAINERS file >> - Update fu540.rst on how to build and flash U-boot SPL >> >> Changes in v2: >> - Add DM driver Sifive OTP >> - Split SPL patches into multiple patches >> - Add a seprate patch for _image_binary_end and crc7.c >> - Add a seprate patch to add board -u-boot.dtsi files >> - Update FU540 RISC-V documentation >> >> >> Pragnesh Patel (14): >> misc: add driver for the SiFive otp controller >> riscv: sifive: fu540: Use OTP DM driver for serial environment >> variable >> riscv: Add _image_binary_end for SPL >> lib: Makefile: build crc7.c when CONFIG_MMC_SPI >> riscv: sifive: dts: fu540: Add board -u-boot.dtsi files >> sifive: fu540: add ddr driver >> sifive: dts: fu540: Add DDR controller and phy register settings >> clk: sifive: fu540-prci: Add clock enable and disable ops >> clk: sifive: fu540-prci: Add clock initialization for SPL >> riscv: sifive: fu540: add SPL configuration >> configs: fu540: Add config options for U-boot SPL >> riscv: sifive: fu540: enable all cache ways from u-boot proper >> sifive: fix palmer's email address >> doc: update FU540 RISC-V documentation > >Thanks for doing this. I don't see any responses here and I'm afraid I'm not >even remotely familiar with u-boot development, but I took a look and don't >see any issues aside from what I replied to. Thanks Palmer. @jagan at amarulasolutions.com Do you have any comment on this series ? > >> >> arch/riscv/cpu/u-boot-spl.lds | 1 + >> arch/riscv/dts/fu540-c000-u-boot.dtsi | 63 + >> arch/riscv/dts/fu540-sdram-lpddr4.dtsi | 1489 +++++++++++++++++ >> .../dts/hifive-unleashed-a00-u-boot.dtsi | 23 + >> board/sifive/fu540/Kconfig | 10 + >> board/sifive/fu540/MAINTAINERS | 2 +- >> board/sifive/fu540/Makefile | 5 + >> board/sifive/fu540/cache.c | 20 + >> board/sifive/fu540/cache.h | 13 + >> board/sifive/fu540/fu540-memory-map.h | 33 + >> board/sifive/fu540/fu540.c | 139 +- >> board/sifive/fu540/spl.c | 78 + >> board/sifive/fu540/ux00prci.h | 56 + >> common/spl/Kconfig | 7 + >> configs/sifive_fu540_defconfig | 11 + >> doc/board/sifive/fu540.rst | 409 ++++- >> drivers/clk/sifive/fu540-prci.c | 169 +- >> drivers/misc/Kconfig | 7 + >> drivers/misc/Makefile | 1 + >> drivers/misc/sifive-otp.c | 241 +++ >> drivers/ram/Kconfig | 7 + >> drivers/ram/Makefile | 2 + >> drivers/ram/sifive/Kconfig | 8 + >> drivers/ram/sifive/Makefile | 6 + >> drivers/ram/sifive/sdram_fu540.c | 295 ++++ >> drivers/ram/sifive/sdram_fu540.h | 94 ++ >> include/configs/sifive-fu540.h | 18 + >> lib/Makefile | 1 + >> 28 files changed, 3107 insertions(+), 101 deletions(-) create mode >> 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi >> create mode 100644 arch/riscv/dts/fu540-sdram-lpddr4.dtsi >> create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi >> create mode 100644 board/sifive/fu540/cache.c create mode 100644 >> board/sifive/fu540/cache.h create mode 100644 >> board/sifive/fu540/fu540-memory-map.h >> create mode 100644 board/sifive/fu540/spl.c create mode 100644 >> board/sifive/fu540/ux00prci.h create mode 100644 >> drivers/misc/sifive-otp.c create mode 100644 >> drivers/ram/sifive/Kconfig create mode 100644 >> drivers/ram/sifive/Makefile create mode 100644 >> drivers/ram/sifive/sdram_fu540.c create mode 100644 >> drivers/ram/sifive/sdram_fu540.h
On Sun, Mar 8, 2020 at 3:28 PM Pragnesh Patel <pragnesh.patel at sifive.com> wrote: > > Hi, > > >-----Original Message----- > >From: Palmer Dabbelt <palmerdabbelt at google.com> > >Sent: 06 March 2020 22:32 > >To: Pragnesh Patel <pragnesh.patel at sifive.com> > >Cc: u-boot at lists.denx.de; Atish Patra <Atish.Patra at wdc.com>; > >bmeng.cn at gmail.com; Paul Walmsley <paul.walmsley at sifive.com>; > >jagan at amarulasolutions.com; Troy Benjegerdes > ><troy.benjegerdes at sifive.com>; Anup Patel <Anup.Patel at wdc.com>; Sagar > >Kadam <sagar.kadam at sifive.com>; Pragnesh Patel > ><pragnesh.patel at sifive.com> > >Subject: Re: [PATCH v4 00/14] RISC-V SiFive FU540 support SPL > > > >On Mon, 24 Feb 2020 00:32:32 PST (-0800), pragnesh.patel at sifive.com wrote: > >> This series add support for SPL to FU540.U-Boot SPL can boot from > >> L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and > >> U-Boot proper from MMC devices. > >> > >> How to test this patch: > >> 1) Go to OpenSBI-dir : make PLATFORM=sifive/fu540 O=build_dir > >> I=install_dir FW_DYNAMIC=y install > >> 2) cp install_dir/platform/sifive/fu540/firmware/fw_dynamic.bin > >> <u-boot-dir>/ > >> 3) Change to u-boot-dir > >> 4) make sifive_fu540_defconfig > >> 5) make all > >> 6) ZSBL loads the U-boot SPL(u-boot-spl.bin) from a partition with > >> GUID type 5B193300-FC78-40CD-8002-E86C45580B47 > >> > >> sudo dd if=spl/u-boot-spl.bin of=/dev/sdc4 bs=1M > >> > >> 7) U-boot SPL expects a u-boot FIT image(u-boot.itb) from 1st > >partition(/dev/sdc1) > >> of SD card irrespective of GUID > >> > >> sudo dd if=u-boot.itb of=/dev/sdc1 bs=1M > >> > >> Thanks to Yash Shah <yash.shah at sifive.com> for testing the series. > >> > >> Changes in v4: > >> - Split misc DM driver patch into multiple patches > >> - Added new SPL_CRC7_SUPPORT Kconfig option > >> - Added DM driver for DDR > >> - Added clk_enable and clk_disable ops in SiFive PRCI driver > >> - Added early clock initialization for SPL in SiFive PRCI driver > >> - Added SPL config options in sifive_fu540_defconfig instead of > >> creatiing a new config file for SPL > >> - Update fu540.rst on how to build and flash U-boot SPL > >> > >> Changes in v3: > >> - Remove arch-fu540 and arch-sifive from arch/riscv/include/asm/ > >> - Split SPL patches into DDR and SPL and spl defconfig > >> - Update fu540/MAINTAINERS file > >> - Update fu540.rst on how to build and flash U-boot SPL > >> > >> Changes in v2: > >> - Add DM driver Sifive OTP > >> - Split SPL patches into multiple patches > >> - Add a seprate patch for _image_binary_end and crc7.c > >> - Add a seprate patch to add board -u-boot.dtsi files > >> - Update FU540 RISC-V documentation > >> > >> > >> Pragnesh Patel (14): > >> misc: add driver for the SiFive otp controller > >> riscv: sifive: fu540: Use OTP DM driver for serial environment > >> variable > >> riscv: Add _image_binary_end for SPL > >> lib: Makefile: build crc7.c when CONFIG_MMC_SPI > >> riscv: sifive: dts: fu540: Add board -u-boot.dtsi files > >> sifive: fu540: add ddr driver > >> sifive: dts: fu540: Add DDR controller and phy register settings > >> clk: sifive: fu540-prci: Add clock enable and disable ops > >> clk: sifive: fu540-prci: Add clock initialization for SPL > >> riscv: sifive: fu540: add SPL configuration > >> configs: fu540: Add config options for U-boot SPL > >> riscv: sifive: fu540: enable all cache ways from u-boot proper > >> sifive: fix palmer's email address > >> doc: update FU540 RISC-V documentation > > > >Thanks for doing this. I don't see any responses here and I'm afraid I'm not > >even remotely familiar with u-boot development, but I took a look and don't > >see any issues aside from what I replied to. > > Thanks Palmer. > @jagan at amarulasolutions.com Do you have any comment on this series ? We should target to bring the FU540 U-Boot SPL support in U-Boot v2020.07. I would like to have some test on this series. Regards, Bin
This series add support for SPL to FU540.U-Boot SPL can boot from L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and U-Boot proper from MMC devices. How to test this patch: 1) Go to OpenSBI-dir : make PLATFORM=sifive/fu540 O=build_dir I=install_dir FW_DYNAMIC=y install 2) cp install_dir/platform/sifive/fu540/firmware/fw_dynamic.bin <u-boot-dir>/ 3) Change to u-boot-dir 4) make sifive_fu540_defconfig 5) make all 6) ZSBL loads the U-boot SPL(u-boot-spl.bin) from a partition with GUID type 5B193300-FC78-40CD-8002-E86C45580B47 sudo dd if=spl/u-boot-spl.bin of=/dev/sdc4 bs=1M 7) U-boot SPL expects a u-boot FIT image(u-boot.itb) from 1st partition(/dev/sdc1) of SD card irrespective of GUID sudo dd if=u-boot.itb of=/dev/sdc1 bs=1M Thanks to Yash Shah <yash.shah at sifive.com> for testing the series. Changes in v4: - Split misc DM driver patch into multiple patches - Added new SPL_CRC7_SUPPORT Kconfig option - Added DM driver for DDR - Added clk_enable and clk_disable ops in SiFive PRCI driver - Added early clock initialization for SPL in SiFive PRCI driver - Added SPL config options in sifive_fu540_defconfig instead of creatiing a new config file for SPL - Update fu540.rst on how to build and flash U-boot SPL Changes in v3: - Remove arch-fu540 and arch-sifive from arch/riscv/include/asm/ - Split SPL patches into DDR and SPL and spl defconfig - Update fu540/MAINTAINERS file - Update fu540.rst on how to build and flash U-boot SPL Changes in v2: - Add DM driver Sifive OTP - Split SPL patches into multiple patches - Add a seprate patch for _image_binary_end and crc7.c - Add a seprate patch to add board -u-boot.dtsi files - Update FU540 RISC-V documentation Pragnesh Patel (14): misc: add driver for the SiFive otp controller riscv: sifive: fu540: Use OTP DM driver for serial environment variable riscv: Add _image_binary_end for SPL lib: Makefile: build crc7.c when CONFIG_MMC_SPI riscv: sifive: dts: fu540: Add board -u-boot.dtsi files sifive: fu540: add ddr driver sifive: dts: fu540: Add DDR controller and phy register settings clk: sifive: fu540-prci: Add clock enable and disable ops clk: sifive: fu540-prci: Add clock initialization for SPL riscv: sifive: fu540: add SPL configuration configs: fu540: Add config options for U-boot SPL riscv: sifive: fu540: enable all cache ways from u-boot proper sifive: fix palmer's email address doc: update FU540 RISC-V documentation arch/riscv/cpu/u-boot-spl.lds | 1 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 63 + arch/riscv/dts/fu540-sdram-lpddr4.dtsi | 1489 +++++++++++++++++ .../dts/hifive-unleashed-a00-u-boot.dtsi | 23 + board/sifive/fu540/Kconfig | 10 + board/sifive/fu540/MAINTAINERS | 2 +- board/sifive/fu540/Makefile | 5 + board/sifive/fu540/cache.c | 20 + board/sifive/fu540/cache.h | 13 + board/sifive/fu540/fu540-memory-map.h | 33 + board/sifive/fu540/fu540.c | 139 +- board/sifive/fu540/spl.c | 78 + board/sifive/fu540/ux00prci.h | 56 + common/spl/Kconfig | 7 + configs/sifive_fu540_defconfig | 11 + doc/board/sifive/fu540.rst | 409 ++++- drivers/clk/sifive/fu540-prci.c | 169 +- drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/sifive-otp.c | 241 +++ drivers/ram/Kconfig | 7 + drivers/ram/Makefile | 2 + drivers/ram/sifive/Kconfig | 8 + drivers/ram/sifive/Makefile | 6 + drivers/ram/sifive/sdram_fu540.c | 295 ++++ drivers/ram/sifive/sdram_fu540.h | 94 ++ include/configs/sifive-fu540.h | 18 + lib/Makefile | 1 + 28 files changed, 3107 insertions(+), 101 deletions(-) create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/fu540-sdram-lpddr4.dtsi create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi create mode 100644 board/sifive/fu540/cache.c create mode 100644 board/sifive/fu540/cache.h create mode 100644 board/sifive/fu540/fu540-memory-map.h create mode 100644 board/sifive/fu540/spl.c create mode 100644 board/sifive/fu540/ux00prci.h create mode 100644 drivers/misc/sifive-otp.c create mode 100644 drivers/ram/sifive/Kconfig create mode 100644 drivers/ram/sifive/Makefile create mode 100644 drivers/ram/sifive/sdram_fu540.c create mode 100644 drivers/ram/sifive/sdram_fu540.h