From patchwork Wed Nov 14 09:01:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 151047 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp5435589ljp; Wed, 14 Nov 2018 01:01:34 -0800 (PST) X-Google-Smtp-Source: AJdET5ezfR6mR2cZp60wJiOmYmY98XwbBdulxTfMF/mdMxjzlILcywJz7mLsrGUV+SqgdFR7DIi8 X-Received: by 2002:a50:b704:: with SMTP id g4-v6mr1337315ede.139.1542186094159; Wed, 14 Nov 2018 01:01:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542186094; cv=none; d=google.com; s=arc-20160816; b=HKIrsuMUQv5FWEGjV3XXKnLND2YGQAykXw3EDPJJBIIYpEVQ22kUxmSz7rfmWv/OF+ /K7crNXVxM02A66YHeIdZJ2SYYo65W9m7QoFa1ADDZ7p2Ls9BndSPBoq9jNkANEgtPmI bpaM4Sq1QLOc2aTmowoatg0LCHYoa6a8QFZXbaU0Nchjt9F4pBMXf9mQYIu5ngPYeGHN BEYhXO/Bkc+qOfkgot4pSvDVUhZMxvb8ZHt9qiqVphMaYOUzWYeVhWB3OS2EbIZA9HJI dMpS37xZds65ik/TD7rrMkr76+xb4J1TTzjTgAw7jW8fPw6j6mwxvn69iVFpqCT8wxkE Ts8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:message-id:date:to:from :dkim-signature; bh=6BrXymybWutAwxKczKvu5zG4nvMjY6c1GCdNZovhlxM=; b=zuPHOdBhrCXQSNYYHpLhK7fK+ope99/aCog7L1PbEcd+3qdWIT7aQFBe6h/z9hrryC MdfPuzSFQE1P4rkbQYk0YrjjQ50EkLHXuLn14EsiTamWRgLYrqXAxZKlxePnOSpj0WHu r8SBfY8o2TQDfJAnW+uXGGyYhGKDsrt6a8j3OQmV0yYfM8+XMQusDsj4lQpcY2LR1TMq mTSuieHOQ5lDa3sCwntzKvEEE5A/0J10oTqWlF0ZbcB0yAGbuJ8H6Skc7j/8TaJq8XYQ XkEGtOgmtE9nErnkatmYmXReJYJa1SYNiBlut30IY+Wkj4PrpWVeYJ2z+SWYrIKPVLFx /Heg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=AApda5UM; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id g31-v6si4423083ede.139.2018.11.14.01.01.33; Wed, 14 Nov 2018 01:01:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=AApda5UM; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id 93EF8C22070; Wed, 14 Nov 2018 09:01:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B9BDFC21F77; Wed, 14 Nov 2018 09:01:30 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7157DC21F77; Wed, 14 Nov 2018 09:01:29 +0000 (UTC) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by lists.denx.de (Postfix) with ESMTPS id 1C0D3C21EF2 for ; Wed, 14 Nov 2018 09:01:29 +0000 (UTC) Received: by mail-wr1-f68.google.com with SMTP id b13so16318466wrx.6 for ; Wed, 14 Nov 2018 01:01:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=SAZRR9xnP8HGJ+Mk2DFCIJC6LHdkLB3dco4IeMVm9QY=; b=AApda5UMPyfNxpicNsS5/5bAxH4D53p06/WRxL/06U+4P5I4te0OI7c5zRUbcfRQJX pVF6lqEwYg8GUBPCZLmVhAfdzMSVWUVd8yntc9q2Yz7GCQPsIYiboloA+lfbYAZ16IRA bdrRaSZz4svLhfSbHUVoYETjjxbtCgVUIno1I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=SAZRR9xnP8HGJ+Mk2DFCIJC6LHdkLB3dco4IeMVm9QY=; b=qNoNPigQRJFUsaC/lo/UIdjwzU1nPj9zNv8QBb7fb7oP641NF8951cSFTFVK0zzouv z8+A5kD8W2dtzGlnJtKYRLbVQk17b88zMjQDdQWYtofNOgpZvhV9XPkWkb3iuCt4gxuD I7lF3KFRfgTIKb4wqqjZDyUslg94Hr2XFY55JiSxt9hTGB+iPj76swifhp0Jwl3IKqut k1xULGpu5/g6GEywJBu78X39fdYXFCXiBsavBcPCPAuSY6gesXP6vnssWaPHWmR42/uW nTDo5njplYxVsF/7G9en6VYg2rjlqAjis4m4e28MYGGrIS3xn2rzI2j/10pcS/kLtSiB vChQ== X-Gm-Message-State: AGRZ1gIMla20ve+iGS1FGpEwyaPbNo5/UEnw5/v3LlIKoa+sdCwycgha Disp/cfeLKBmZah17d2cfJdzSA== X-Received: by 2002:adf:f98a:: with SMTP id f10-v6mr1018335wrr.134.1542186088717; Wed, 14 Nov 2018 01:01:28 -0800 (PST) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1088:2b4c:4d39:8b22:d570:822a]) by smtp.gmail.com with ESMTPSA id j125-v6sm14474871wmb.12.2018.11.14.01.01.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Nov 2018 01:01:28 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: patrick.delaunay@st.com, albert.u.boot@aribaud.net, sjg@chromium.org, christophe.kerello@st.com, patrice.chotard@st.com Date: Wed, 14 Nov 2018 10:01:10 +0100 Message-Id: <20181114090114.7727-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 Cc: uboot-stm32@st-md-mailman.stormreply.com, u-boot@lists.denx.de, Benjamin Gaignard Subject: [U-Boot] [PATCH v2 0/4] Add Hardware Spinlock class X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" version 2: - use -ETIMEDOUT and -ENOSYS for errors cases - do not test if ops is valid - remove useless include - add a private structure to store base address - be more verbose in configuration flag description and commit message - log the error after hwspinlock_get_by_index() This series add a news class to support hardware spinlock. Hardware spinlock could be used to protect critical sections of code between multi-processors. The proposed API remain simple with only 3 functions to be called client: - hwspinlock_get_by_index: get a hardware spinlock by integer index from device-tree node - hwspinlock_lock_timeout: lock the hardware spinlock - hwspinlock_unlock: unlock the hardware spinlock Driver API offert 4 operations: - of_xlate: translate a client's device-tree (OF) hardware specifier - lock: lock the hardware spinlock - unlock: unlock the hardware spinlock - relax: wait time between two calls to lock operations Benjamin Gaignard (4): dm: Add Hardware Spinlock class clk: stm32: add hardware spinlock clock hwspinlock: add stm32 hardware spinlock support pinctrl: stm32: make pinctrl use hwspinlock arch/arm/dts/stm32mp157c-ed1.dts | 8 ++ arch/arm/dts/stm32mp157c.dtsi | 9 ++ arch/sandbox/dts/test.dts | 4 + arch/sandbox/include/asm/state.h | 1 + configs/sandbox_defconfig | 2 + configs/stm32mp15_basic_defconfig | 2 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/clk/clk_stm32mp1.c | 3 + drivers/hwspinlock/Kconfig | 24 ++++++ drivers/hwspinlock/Makefile | 7 ++ drivers/hwspinlock/hwspinlock-uclass.c | 143 ++++++++++++++++++++++++++++++++ drivers/hwspinlock/sandbox_hwspinlock.c | 56 +++++++++++++ drivers/hwspinlock/stm32_hwspinlock.c | 92 ++++++++++++++++++++ drivers/pinctrl/pinctrl_stm32.c | 27 ++++++ include/dm/uclass-id.h | 1 + include/hwspinlock.h | 140 +++++++++++++++++++++++++++++++ test/dm/Makefile | 1 + test/dm/hwspinlock.c | 40 +++++++++ 19 files changed, 563 insertions(+) create mode 100644 drivers/hwspinlock/Kconfig create mode 100644 drivers/hwspinlock/Makefile create mode 100644 drivers/hwspinlock/hwspinlock-uclass.c create mode 100644 drivers/hwspinlock/sandbox_hwspinlock.c create mode 100644 drivers/hwspinlock/stm32_hwspinlock.c create mode 100644 include/hwspinlock.h create mode 100644 test/dm/hwspinlock.c