From patchwork Wed Apr 18 13:40:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 133625 Delivered-To: patch@linaro.org Received: by 10.46.84.18 with SMTP id i18csp5893947ljb; Wed, 18 Apr 2018 06:42:04 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/WeLYSbU2iJH/4886ibgfbk+tEaDuP9KhqHcxdZ/cTd6nxlwCY3k8WzpUnsVKeWrWkW26u X-Received: by 10.80.162.230 with SMTP id 93mr3261170edm.121.1524058924842; Wed, 18 Apr 2018 06:42:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524058924; cv=none; d=google.com; s=arc-20160816; b=gyNRSdsuFf3YbqhdLYaHjWlw1/QOjx0Eo6Qwy1QK2YAAf4OiK3qS4wFSlexU19lOsI mmaCl06Bdy3vDS2It+ZjTJN8Eudftp8GIDrS5kpl1VN9A/0aBamy/89fCD9TRHTx2EGe 2Hht/ZsCTiQ/amUqHtRm3XXDHdSpgCiIHpxhKWcWFBtmh9/l3eO35r7kl8ZMTuw0pTTI 676Aryg5N6evNjSoBWBDiVthhAAz8fZKm0hvAZu78a+qJuaPuz1BhV4IKg2yevuM/D74 USvC/NtDUVRgMJU4IwABgfvU/38PLEP/gAXdWAPJV9KZl2rghKnkzDFaraVP3jt2QHQt BV/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:message-id:date:to:from :arc-authentication-results; bh=80dyRZ52iZ4dCOwTpxvcPFBEacy3uib70oN/5JHW6Ns=; b=qQA05iqpipUl8JwRMtHKOzhvJqINugaf8J/4DvOfbQsu0hpTnBK+ZZZJHXd/rz6uWv B0ObMr8CygR9jQR5NLewpnS7cOigLGU01vVuCT2coM7iPaD1MOFbyOyyXFW+NLYsFT3X i3bnLo08w8qcKg2jjaw66hmIOFCD3HsHjilaYRzQsRmSyrtCht9nfviJgVrkAEq/rjBE NvZwhQNVxELpkjNoykcT+3zNwvHoKZe64tFCqQHNRb6Sg8KgtLhs8hsLUhBCBp5NhLgY D4h2OjFEa8ZBL34c6GL4ukpo25hG479fjc+PAM+C5Qg1aPnYW6Tskpsuq63Y/itUlhWf Z9NQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id 24si1449310edv.308.2018.04.18.06.42.04; Wed, 18 Apr 2018 06:42:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 4C9BFC21E75; Wed, 18 Apr 2018 13:40:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4946AC21E75; Wed, 18 Apr 2018 13:40:37 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3DB44C21DA1; Wed, 18 Apr 2018 13:40:34 +0000 (UTC) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by lists.denx.de (Postfix) with ESMTPS id A452FC21DA1 for ; Wed, 18 Apr 2018 13:40:33 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id F2D1FAC95; Wed, 18 Apr 2018 13:40:32 +0000 (UTC) From: Alexander Graf To: u-boot@lists.denx.de Date: Wed, 18 Apr 2018 15:40:22 +0200 Message-Id: <20180418134030.55127-1-agraf@suse.de> X-Mailer: git-send-email 2.12.3 Cc: Heinrich Schuchardt , Greentime Hu Subject: [U-Boot] [PATCH 0/8] riscv: Enable efi_loader support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We now have RISC-V support in U-Boot - which is great! However, not that we're finally making progress to converge on efi_loader and distro boot for booting on ARM platforms, we really want to make sure there is no technical reason not to do the same on RISC-V as well. So this patch set introduces distro boot and efi_loader support for RISC-V! So far, I've only tested it with the selftest, as the number of target binaries to run is still slim. But it should at least give us a good starting point. Alexander Graf (8): riscv: Add setjmp/longjmp code riscv: Enable function sections efi_loader: selftest: Do not build relocation tests for risc-v riscv: Add board_quiesce_devices stub efi_loader: Use EFI_CACHELINE_SIZE in the image loader too distro: Extend with RISC-V defines riscv: nx25: Enable distro boot efi_loader: Enable RISC-V support arch/riscv/config.mk | 2 +- arch/riscv/cpu/nx25/u-boot.lds | 16 +++++++++++ arch/riscv/include/asm/setjmp.h | 24 ++++++++++++++++ arch/riscv/include/asm/u-boot-riscv.h | 1 + arch/riscv/lib/Makefile | 1 + arch/riscv/lib/bootm.c | 4 +++ arch/riscv/lib/setjmp.S | 54 +++++++++++++++++++++++++++++++++++ configs/nx25-ae250_defconfig | 1 + include/config_distro_bootcmd.h | 14 ++++++++- include/configs/nx25-ae250.h | 17 +++++++++++ include/efi_loader.h | 7 +++++ lib/efi_loader/Kconfig | 2 +- lib/efi_loader/efi_image_loader.c | 2 +- lib/efi_loader/efi_runtime.c | 48 +++++++++++++++++++++++-------- lib/efi_selftest/Makefile | 11 ++++--- 15 files changed, 184 insertions(+), 20 deletions(-) create mode 100644 arch/riscv/include/asm/setjmp.h create mode 100644 arch/riscv/lib/setjmp.S