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[113.37.226.201]) by smtp.gmail.com with ESMTPSA id z14sm94901pfe.30.2022.02.17.07.11.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 07:11:20 -0800 (PST) From: Masami Hiramatsu To: u-boot@lists.denx.de Cc: Masami Hiramatsu , Patrick Delaunay , Patrice Chotard , Heinrich Schuchardt , Alexander Graf , AKASHI Takahiro , Simon Glass , Bin Meng , Ilias Apalodimas , Jose Marinho , Grant Likely , Tom Rini , Etienne Carriere , Sughosh Ganu , Paul Liu Subject: [RFC PATCH v2 0/8] FWU: Add FWU Multi Bank Update for DeveloerBox Date: Fri, 18 Feb 2022 00:11:16 +0900 Message-Id: <164511067605.43219.15508992404634142079.stgit@localhost> X-Mailer: git-send-email 2.25.1 User-Agent: StGit/0.19 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi, Here is the 2nd version of RFC series of patches for the FWU Multi Bank Update support for the DeveloperBox platform. This series depends on Sughosh's Multi Bank Update v4 [1]. [1] https://lore.kernel.org/all/20220207182001.31270-1-sughosh.ganu@linaro.org/T/#u Unlike the STM32MP board, DeveloperBox (SynQuacer) loads the firmware from SPI NOR flash. Thus it doesn't use GPT partitions to store the firmware banks and the FWU metadata. Instead, it stores those data at fixed address areas on SPI NOR flash. I carefully chose the areas which doesn't overlap the previous firmware and EDK2. This adds FWU metadata SF driver for this FWU multi bank support on SPI flash without GPT. This is identified by "u-boot,fwu-mdata-sf". The last patch adds the DT bindings in YAML. Since there is no GPT, the location GUID for images and the image GUID for banks are Null GUID. I will fix this with uuid property for fixed-partition devicetree afterwards. And the SynQuacer also does not have any non-volatile register. Thus this allocates the platform defined boot index on the SPI flash too. NOTE: To use this series, you also need to update SCP firmware[2] and TF-A[3] on the DeveloperBox. Those are under cleaning up. [2] https://git.linaro.org/people/masami.hiramatsu/SCP-firmware.git/ [3] https://git.linaro.org/people/masami.hiramatsu/arm-trusted-firmware.git/ Thank you, --- Masami Hiramatsu (8): FWU: Calculate CRC32 in fwu_update_mdata() FWU: Free metadata copy if gpt_get_mdata() failed synquacer: Update for TBBR based new FIP layout dt/bindings: firmware: Add FWU metadata on SPI flash binding FWU: Add FWU metadata access driver for SPI flash FWU: synquacer: Add FWU Multi bank update support for DeveloperBox FWU: synquacer: Initialize broken metadata configs: synquacer: Add FWU support for DeveloperBox .../dts/synquacer-sc2a11-developerbox-u-boot.dtsi | 33 ++ board/socionext/developerbox/Kconfig | 24 ++ board/socionext/developerbox/Makefile | 1 board/socionext/developerbox/fwu_plat.c | 238 ++++++++++++++++ configs/synquacer_developerbox_defconfig | 12 + .../firmware/fwu-mdata-sf.yaml | 38 +++ drivers/fwu-mdata/Kconfig | 9 + drivers/fwu-mdata/Makefile | 1 drivers/fwu-mdata/fwu-mdata-uclass.c | 57 +--- drivers/fwu-mdata/fwu_mdata_gpt_blk.c | 49 ++- drivers/fwu-mdata/fwu_mdata_sf.c | 294 ++++++++++++++++++++ include/configs/synquacer.h | 14 + include/fwu.h | 2 13 files changed, 698 insertions(+), 74 deletions(-) create mode 100644 board/socionext/developerbox/fwu_plat.c create mode 100644 doc/device-tree-bindings/firmware/fwu-mdata-sf.yaml create mode 100644 drivers/fwu-mdata/fwu_mdata_sf.c -- Masami Hiramatsu