Message ID | 1507890129-1543-1-git-send-email-yamada.masahiro@socionext.com |
---|---|
Headers | show |
Series | ARM: uniphier: various refactoring for v2017.11-rc2 | expand |
2017-10-13 19:21 GMT+09:00 Masahiro Yamada <yamada.masahiro@socionext.com>: > - Reactor of GPIO, clk, reset drivers. > - Clean up SOC code > - Sync DT > - Use more clock drivers > - Split U-Boot specific DT property > > > Masahiro Yamada (20): > ARM: uniphier: switch to CONFIG_ENV_IS_NOWHERE > gpio: uniphier: rework single device node model > ARM: dts: uniphier: update GPIO nodes > pinctrl: uniphier: set PUPD_SIMPLE cap flag for PXs3 > pinctrl: uniphier: simplify input enable and delete pin arrays > ARM: uniphier: use pr_() instead of printf() where appropriate > usb: dwc3-uniphier: replace <common.h> with <linux/bitops.h> > i2c: uniphier: replace debug() with dev_dbg() > i2c: uniphier-f: replace debug() with dev_dbg() > clk: uniphier: rework for better clock tree structure > clk: uniphier: add PXs3 clock data > clk: uniphier: add peripheral clock data > reset: uniphier: fix the first argument passed to dev_err() > i2c: uniphier: use clk for enable and get_rate > i2c: uniphier-f: use clk for enable and get_rate > ARM: uniphier: split u-boot,dm-pre-reloc out to > uniphier-v7-u-boot.dtsi > ARM: dts: uniphier: prepare to use clock for serial > serial: uniphier: use clk for enable and get_rate > ARM: dts: uniphier: sync DT with Linux 4.14-rc4 > ARM: uniphier: change the default of SoC select to UNIPHIER_V7_MULTI > 1-11, 13, 20 applied to u-boot-uniphier. The others have been deferred because I found the SPL size exceeds the limit depending on compiler.