diff mbox series

[v4.4,03/45] arm64: remove duplicate macro KERNEL check

Message ID	397130f9dfb4aa9a600872fb5ed66c90664b830f.1560480942.git.viresh.kumar@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; From: Viresh Kumar <viresh.kumar@linaro.org> To: linux-arm-kernel@lists.infradead.org, Julien Thierry <Julien.Thierry@arm.com> Cc: Viresh Kumar <viresh.kumar@linaro.org>, stable@vger.kernel.org, Catalin Marinas <catalin.marinas@arm.com>, Marc Zyngier <marc.zyngier@arm.com>, Mark Rutland <mark.rutland@arm.com>, Will Deacon <will.deacon@arm.com>, Russell King <rmk+kernel@arm.linux.org.uk>, Vincent Guittot <vincent.guittot@linaro.org>, mark.brown@arm.com Subject: [PATCH v4.4 03/45] arm64: remove duplicate macro __KERNEL__ check Date: Fri, 14 Jun 2019 08:37:46 +0530 Message-Id: <397130f9dfb4aa9a600872fb5ed66c90664b830f.1560480942.git.viresh.kumar@linaro.org> In-Reply-To: <cover.1560480942.git.viresh.kumar@linaro.org> References: <cover.1560480942.git.viresh.kumar@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk
Series	V4.4 backport of arm64 Spectre patches \| expand [v4.4,00/45] V4.4 backport of arm64 Spectre patches [v4.4,01/45] arm64: barrier: Add CSDB macros to control data-value prediction [v4.4,02/45] arm64: Implement array_index_mask_nospec() [v4.4,03/45] arm64: remove duplicate macro __KERNEL__ check [v4.4,04/45] arm64: move TASK_* definitions to <asm/processor.h> [v4.4,05/45] arm64: Make USER_DS an inclusive limit [v4.4,06/45] arm64: Use pointer masking to limit uaccess speculation [v4.4,07/45] arm64: entry: Ensure branch through syscall table is bounded under speculation [v4.4,08/45] arm64: uaccess: Prevent speculative use of the current addr_limit [v4.4,09/45] arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user [v4.4,10/45] mm/kasan: add API to check memory regions [v4.4,11/45] arm64: kasan: instrument user memory access API [v4.4,12/45] arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user [v4.4,13/45] arm64: cpufeature: Pass capability structure to ->enable callback [v4.4,14/45] drivers/firmware: Expose psci_get_version through psci_ops structure [v4.4,15/45] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro [v4.4,16/45] arm64: Move post_ttbr_update_workaround to C code [v4.4,17/45] arm64: cpufeature: Add scope for capability check [v4.4,18/45] arm64: Add skeleton to harden the branch predictor against aliasing attacks [v4.4,19/45] arm64: Move BP hardening to check_and_switch_context [v4.4,20/45] mm: Introduce lm_alias [v4.4,21/45] arm64: entry: Apply BP hardening for high-priority synchronous exceptions [v4.4,22/45] arm64: entry: Apply BP hardening for suspicious interrupts from EL0 [v4.4,23/45] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 [v4.4,24/45] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core [v4.4,25/45] arm64: Implement branch predictor hardening for affected Cortex-A CPUs [v4.4,26/45] arm64: cputype info for Broadcom Vulcan [v4.4,27/45] arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUs [v4.4,28/45] arm64: Branch predictor hardening for Cavium ThunderX2 [v4.4,29/45] arm64: KVM: Increment PC after handling an SMC trap [v4.4,30/45] arm/arm64: KVM: Consolidate the PSCI include files [v4.4,31/45] arm/arm64: KVM: Add PSCI_VERSION helper [v4.4,32/45] arm/arm64: KVM: Add smccc accessors to PSCI code [v4.4,33/45] ARM: 8478/2: arm/arm64: add arm-smccc [v4.4,34/45] arm/arm64: KVM: Implement PSCI 1.0 support [v4.4,35/45] arm/arm64: KVM: Advertise SMCCC v1.1 [v4.4,36/45] arm/arm64: KVM: Turn kvm_psci_version into a static inline [v4.4,37/45] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support [v4.4,38/45] arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling [v4.4,39/45] firmware/psci: Expose PSCI conduit [v4.4,40/45] firmware/psci: Expose SMCCC version through psci_ops [v4.4,41/45] arm/arm64: smccc: Make function identifiers an unsigned quantity [v4.4,42/45] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive [v4.4,43/45] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support [v4.4,44/45] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround [v4.4,45/45] arm64: futex: Mask __user pointers prior to dereference

Commit Message

Viresh Kumar June 14, 2019, 3:07 a.m. UTC

From: zijun_hu <zijun_hu@htc.com>


commit a842789837c0e3734357c6b4c54d39d60a1d24b1 upstream.

remove duplicate macro __KERNEL__ check

Signed-off-by: zijun_hu <zijun_hu@htc.com>

Signed-off-by: Will Deacon <will.deacon@arm.com>

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

---
 arch/arm64/include/asm/processor.h | 2 --
 1 file changed, 2 deletions(-)

-- 
2.21.0.rc0.269.g1a574e7a288b

diff mbox series

Patch

diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index d08559528927..b1126eea73ae 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -35,7 +35,6 @@ 
 #include <asm/ptrace.h>
 #include <asm/types.h>
 
-#ifdef __KERNEL__
 #define STACK_TOP_MAX		TASK_SIZE_64
 #ifdef CONFIG_COMPAT
 #define AARCH32_VECTORS_BASE	0xffff0000
@@ -47,7 +46,6 @@ 
 
 extern phys_addr_t arm64_dma_phys_limit;
 #define ARCH_LOW_ADDRESS_LIMIT	(arm64_dma_phys_limit - 1)
-#endif /* __KERNEL__ */
 
 struct debug_info {
 	/* Have we suspended stepping by a debugger? */

[v4.4,03/45] arm64: remove duplicate macro __KERNEL__ check

Commit Message

Patch

[v4.4,03/45] arm64: remove duplicate macro KERNEL check