From patchwork Wed May 12 14:48:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 435669 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp5181404jao; Wed, 12 May 2021 13:58:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx6rijNsezp0PeB+bbiJM3ON7w9Xg2q+DQyZGXRfwymMXxoJEZfKwbASwti5s0BQbQA4l+j X-Received: by 2002:a50:fd13:: with SMTP id i19mr3689061eds.386.1620853084412; Wed, 12 May 2021 13:58:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620853084; cv=none; d=google.com; s=arc-20160816; b=epshyYDOOaAkO28weSFzErbNpnXnORb90DxyBw3QBC457oEnwsbQ234oZbXikM79iO AuRlAQhN8sARVGcWVZzSIknVA2lKsY0TsoY9Glx+0WptfvlDIPzLn/1L1k6HQl/2XM1n Fk6POB2QGtz5qOx6atoS7eB4I8cGsk3DlOR8siYxpmsbyAEAcu2ndAJcq7GZvko3OaRq P9dkHJKgmwOWLVT+cgX/zV8o/i2oySD8AUwfZS6j8sgQbKtUtnw97a7aIWFsfQ3diypc 09mM9qggQY6WM/KOwZibbDu9OqmN9JMky2B5iDrZDvu3Wqcixnw/CYHherHVTCUyJPwY Tm6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=54mtqX+tNbBAbaR8E+8PMBPj0MKq3U/1xz3Q52/MKJU=; b=GwyxNmNjVRtgHzENo45HYiRN1puHx5CjyePZXO62Rnvti8/FbuGXuFq/iXNo5D2dql SN49DkwL+TVsW+DOK4W2H+KBmqcKN8lQc7OpjIpcHHxebP999w3EupZkUUlSY6QLTKhA hEggH8EouYpZvyPJw2BfHyJcylv1SqEFwMXLp1VWE2pUHdyU14KM+gwj53a9Lq/vs19K VXmaDl6kPJZd5iwGRiInBJgpHDPVQiQy/rXbMaoeLDH1NuoT2vVXb1WbT7ifgnNhsfs4 0ZfXKM7O/ynwfMOt37AtMo+7JHy1quQRaLjg0EfQE5bKV3chp2dIJ3yyocM84cSKnjTI GTkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b="K5xdN/iO"; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u19si859013ejx.176.2021.05.12.13.58.04; Wed, 12 May 2021 13:58:04 -0700 (PDT) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b="K5xdN/iO"; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244360AbhELQ4H (ORCPT + 12 others); Wed, 12 May 2021 12:56:07 -0400 Received: from mail.kernel.org ([198.145.29.99]:35700 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243982AbhELQmV (ORCPT ); Wed, 12 May 2021 12:42:21 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 464F161CFB; Wed, 12 May 2021 16:09:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1620835751; bh=9KnNYZwONucYcR4j458Q8cVqt1K5CRmSX9Xa3KQ+CUg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K5xdN/iOwAOotiSViz4cgWNumARMH0Yhl73bHjyk08BMizeIgJYEmbr22TykYwJ/b 5x9tZ9bAOLqp1LU5L+igprapGe+Qp6ce54UyY6NGOd+mfBEVCVXC6OZlVNcXJnbrTD SstX0w3Rj2dX5hYG/+nZ2RZj6PdO0Vg8+PH4Ofec= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Rui Zhu , Zhen Lei , Will Deacon , Sasha Levin Subject: [PATCH 5.12 470/677] iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK Date: Wed, 12 May 2021 16:48:36 +0200 Message-Id: <20210512144852.974577489@linuxfoundation.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210512144837.204217980@linuxfoundation.org> References: <20210512144837.204217980@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Zhen Lei [ Upstream commit 655c447c97d7fe462e6cd9e15809037be028bc70 ] In arm_smmu_gerror_handler(), the value of the SMMU_GERROR register is filtered by GERROR_ERR_MASK. However, the GERROR_ERR_MASK does not contain the SFM bit. As a result, the subsequent error processing is not performed when only the SFM error occurs. Fixes: 48ec83bcbcf5 ("iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices") Reported-by: Rui Zhu Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20210324081603.1074-1-thunder.leizhen@huawei.com Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.30.2 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index f985817c967a..230b6f6b3901 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -115,7 +115,7 @@ #define GERROR_PRIQ_ABT_ERR (1 << 3) #define GERROR_EVTQ_ABT_ERR (1 << 2) #define GERROR_CMDQ_ERR (1 << 0) -#define GERROR_ERR_MASK 0xfd +#define GERROR_ERR_MASK 0x1fd #define ARM_SMMU_GERRORN 0x64