From patchwork Wed May 12 14:48:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 435575 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp4961131jao; Wed, 12 May 2021 09:01:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy1RE6lS3MKgyu06N/ky85z1xFCM16t0hjilwL6mep8n2ukMP/p042AWRzGQHlPZsp9RTNE X-Received: by 2002:ac2:4838:: with SMTP id 24mr24926833lft.348.1620835272391; Wed, 12 May 2021 09:01:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620835272; cv=none; d=google.com; s=arc-20160816; b=h5TGE6NWEVM+90GqnRpTZuegsVI3qXb5H2bz2Dkp1/oFxl0Q7gkB06pWt5bubuMVdl d+whd07b197PflPf6Neb3GWoNmVsm+wEs3OC4e5yb2n0iR0boIXA/onxHXEefZ94q9C1 8VkgcfOwz1ricQ2FC03YNnDFBtIeTPti8lx6WeZ1MwFrG5WEdCAVBoJyYK5SD83fHmT3 g8wh8ZZJTqQ7DMtnhv6juAdKsojzCQviyW3N6uu69FkfdJMz9AwsPhE42F9mz8E/ruCr SZ9QVnm5i9rUnxaRCnJov3DnXG5uJo41cgXMoGh2f+9iYMuGCYTPsVlgGY4FkIEEGPyl Fl3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vWGaJ9+fyCPubm8qHd9bHoU2oIYbvac/DvsDVcdB+1Y=; b=iSdTE1qTJMsS88QR1Mnn98JITyIV8qOxp7+UC4KydEGe/OEMcvMmgD5oM19RAr29Zx HwxQ5QeulI8eK2RNHGg+XDCqFkR2+VicE11J1sIO+o0sYwy0GZ9/ZPZ2uZUByqH6R3z1 PS5akXD+c6bDKagySuvCu1t8fApnTNJ7u/T3xlnfthylOxyrO+JSNCXAUoeV9KqPeBR+ zGwvsXfuWiHN8JrSSgAFsBZS23rp2PYGZ2q66JEo/7VnL4XWvfUNGDdDvE8cvziwouCt /DUWwpLDXwGoxg9xWPsVrUInHmZkCqIMB+Jui24reClVjUZvWQSAxLZ61tAxTd46exdW ENqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=haBkmSzZ; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m20si100438lji.284.2021.05.12.09.01.12; Wed, 12 May 2021 09:01:12 -0700 (PDT) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=haBkmSzZ; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232717AbhELPmG (ORCPT + 12 others); Wed, 12 May 2021 11:42:06 -0400 Received: from mail.kernel.org ([198.145.29.99]:56528 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236312AbhELPhf (ORCPT ); Wed, 12 May 2021 11:37:35 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 4007661C58; Wed, 12 May 2021 15:19:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1620832746; bh=9rgStVf8uJ42fg/JS6I/fqJIH8Ygt3YKG46sUok9Azw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=haBkmSzZlzb5xKPcZY/+9qNXdOcczxQocDPptS75VkD51lvqRAlYTFpujV1dO/BW8 0FD1y0OjUxTRc/0pYHUzfevLgoLGAMWSlOp7q38VaXjgkpGjzEFfvOnhvo2w8uhwJt 3MkLbb5o1iephYIl5U5clK7ov/YDwM9RCgvDYZkw= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Rui Zhu , Zhen Lei , Will Deacon , Sasha Levin Subject: [PATCH 5.10 372/530] iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK Date: Wed, 12 May 2021 16:48:02 +0200 Message-Id: <20210512144832.005199577@linuxfoundation.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210512144819.664462530@linuxfoundation.org> References: <20210512144819.664462530@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Zhen Lei [ Upstream commit 655c447c97d7fe462e6cd9e15809037be028bc70 ] In arm_smmu_gerror_handler(), the value of the SMMU_GERROR register is filtered by GERROR_ERR_MASK. However, the GERROR_ERR_MASK does not contain the SFM bit. As a result, the subsequent error processing is not performed when only the SFM error occurs. Fixes: 48ec83bcbcf5 ("iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices") Reported-by: Rui Zhu Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20210324081603.1074-1-thunder.leizhen@huawei.com Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.30.2 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index d4b7f40ccb02..57e5d223c467 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -115,7 +115,7 @@ #define GERROR_PRIQ_ABT_ERR (1 << 3) #define GERROR_EVTQ_ABT_ERR (1 << 2) #define GERROR_CMDQ_ERR (1 << 0) -#define GERROR_ERR_MASK 0xfd +#define GERROR_ERR_MASK 0x1fd #define ARM_SMMU_GERRORN 0x64