From patchwork Mon Apr 19 13:05:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 423987 Delivered-To: patch@linaro.org Received: by 2002:a02:6a6f:0:0:0:0:0 with SMTP id m47csp2705721jaf; Mon, 19 Apr 2021 06:11:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyYfmEDLOHWQinlTAzYeU4nwTZQRxgouKZ36H/Y2qWRGC53I+skuPSO/CuGwB+OK3evYx0i X-Received: by 2002:a17:90a:550f:: with SMTP id b15mr24892889pji.102.1618837895454; Mon, 19 Apr 2021 06:11:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618837895; cv=none; d=google.com; s=arc-20160816; b=Lnb9VsEBPeiEgzTARhSosE5LuMb246S4zvvHo/xhoVBEFLSaKptIRb1G4671eYgaIJ 14rDPq7r50FDNfa2fOWQP22A1n4dTnDHyT3SKDmIvkBCZw1YRHII8gvG+D8/cRwOH5/2 cawDR4y+LkW2NZS3fiZJ8D8eHHQIHBM7J45v6g9t4UMSXBhq0WrTvtjNwp4ktJQOdfwe TimABurOpeNbPNhm59CVy8dvFD6635yDwQ1vfs9RkhxSC69ZcWXSvBvfh5d/heyKA7Rb oXFewaqI4n4qf0GDWgWakgcJy0MH+X36T18wgJxOvo0dFyXGmCc445dUG8VGNwChcUWS U/gQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Het5TbmmzLt9+wCaBjB4hK+XbR3YsM3hZOQ0M4AAFgM=; b=h9Sdh4TqnGY+j7b8geU2cGmu1G7f+Z+HSTVxmNPTWRr714D6uNIdI0RAg6cr81mzki pMSJzXhGkoSq266Q9XM2Mw5CbnH8JWEFKlDEK/uHlPyL6a9W3MuuXAlF6oMX0cSKuiGF klXK0x6l61snYdZIBoWqIbdL3zN2aVaFmjvX0JNq+S9aODaC8o/2jKvMG8D0IBzCTD/3 3pgnCsTGHBuIZn0iGbi2U/OIPqL2D2Cy0VMLAztftQJIGHyT3RpOSMaE4eM+B+SyEzJL cb4fHWXtxt0TPmnsMbCqrUmyUTKE/NiBwc1dTSuYuYX3p5DwraZEhWs1eD8LYNPrjxht nPbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=bxExTDS5; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l13si17371456pjm.38.2021.04.19.06.11.35; Mon, 19 Apr 2021 06:11:35 -0700 (PDT) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=bxExTDS5; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239354AbhDSNL7 (ORCPT + 12 others); Mon, 19 Apr 2021 09:11:59 -0400 Received: from mail.kernel.org ([198.145.29.99]:46846 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239416AbhDSNLC (ORCPT ); Mon, 19 Apr 2021 09:11:02 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 74A4F6135F; Mon, 19 Apr 2021 13:10:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1618837833; bh=7wXP96nWuUgDCqP2gHdAQsGq+E+h5sBier90Nt5GulU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bxExTDS5uC1tzjDc2+CT5b0sGIUmMwTwFNcdJtguODAEk94dKR6+xaXBMP2gnHL0h 39kyui99KBNgoB9EauUhDR55t9GneaDqHksKOcidZ1W0vv8a+48UQNKmKCtbqrJcMr IoKGiSirRFNmAHLONg8XWzUYWRAD88c+qCkV1VZ8= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Catalin Marinas , Will Deacon , Vincenzo Frascino , Mark Rutland Subject: [PATCH 5.11 063/122] arm64: mte: Ensure TIF_MTE_ASYNC_FAULT is set atomically Date: Mon, 19 Apr 2021 15:05:43 +0200 Message-Id: <20210419130532.324819427@linuxfoundation.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210419130530.166331793@linuxfoundation.org> References: <20210419130530.166331793@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Catalin Marinas commit 2decad92f4731fac9755a083fcfefa66edb7d67d upstream. The entry from EL0 code checks the TFSRE0_EL1 register for any asynchronous tag check faults in user space and sets the TIF_MTE_ASYNC_FAULT flag. This is not done atomically, potentially racing with another CPU calling set_tsk_thread_flag(). Replace the non-atomic ORR+STR with an STSET instruction. While STSET requires ARMv8.1 and an assembler that understands LSE atomics, the MTE feature is part of ARMv8.5 and already requires an updated assembler. Signed-off-by: Catalin Marinas Fixes: 637ec831ea4f ("arm64: mte: Handle synchronous and asynchronous tag check faults") Cc: # 5.10.x Reported-by: Will Deacon Cc: Will Deacon Cc: Vincenzo Frascino Cc: Mark Rutland Link: https://lore.kernel.org/r/20210409173710.18582-1-catalin.marinas@arm.com Signed-off-by: Will Deacon Signed-off-by: Greg Kroah-Hartman --- arch/arm64/Kconfig | 6 +++++- arch/arm64/kernel/entry.S | 10 ++++++---- 2 files changed, 11 insertions(+), 5 deletions(-) --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1399,10 +1399,13 @@ config ARM64_PAN config AS_HAS_LDAPR def_bool $(as-instr,.arch_extension rcpc) +config AS_HAS_LSE_ATOMICS + def_bool $(as-instr,.arch_extension lse) + config ARM64_LSE_ATOMICS bool default ARM64_USE_LSE_ATOMICS - depends on $(as-instr,.arch_extension lse) + depends on AS_HAS_LSE_ATOMICS config ARM64_USE_LSE_ATOMICS bool "Atomic instructions" @@ -1659,6 +1662,7 @@ config ARM64_MTE default y depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI depends on AS_HAS_ARMV8_5 + depends on AS_HAS_LSE_ATOMICS # Required for tag checking in the uaccess routines depends on ARM64_PAN select ARCH_USES_HIGH_VMA_FLAGS --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -148,16 +148,18 @@ alternative_cb_end .endm /* Check for MTE asynchronous tag check faults */ - .macro check_mte_async_tcf, flgs, tmp + .macro check_mte_async_tcf, tmp, ti_flags #ifdef CONFIG_ARM64_MTE + .arch_extension lse alternative_if_not ARM64_MTE b 1f alternative_else_nop_endif mrs_s \tmp, SYS_TFSRE0_EL1 tbz \tmp, #SYS_TFSR_EL1_TF0_SHIFT, 1f /* Asynchronous TCF occurred for TTBR0 access, set the TI flag */ - orr \flgs, \flgs, #_TIF_MTE_ASYNC_FAULT - str \flgs, [tsk, #TSK_TI_FLAGS] + mov \tmp, #_TIF_MTE_ASYNC_FAULT + add \ti_flags, tsk, #TSK_TI_FLAGS + stset \tmp, [\ti_flags] msr_s SYS_TFSRE0_EL1, xzr 1: #endif @@ -244,7 +246,7 @@ alternative_else_nop_endif disable_step_tsk x19, x20 /* Check for asynchronous tag check faults in user space */ - check_mte_async_tcf x19, x22 + check_mte_async_tcf x22, x23 apply_ssbd 1, x22, x23 ptrauth_keys_install_kernel tsk, x20, x22, x23