From patchwork Thu Apr 15 14:47:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 421781 Delivered-To: patch@linaro.org Received: by 2002:a02:6a6f:0:0:0:0:0 with SMTP id m47csp549119jaf; Thu, 15 Apr 2021 07:56:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzHHrZ2MGN3wsVdCP6jWBl4rypieW2eX8uT41pbKMgDAjjXqKe7UvpZyCR47h2sxzTs0LyZ X-Received: by 2002:aa7:d588:: with SMTP id r8mr4820210edq.318.1618498587191; Thu, 15 Apr 2021 07:56:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618498587; cv=none; d=google.com; s=arc-20160816; b=x/b/7osnIO64MCkGV6q2BMrnaCPOT4LkCe2zn7u5n1Y1kUKU05El8CHeRUea1+NR0E bFjDo92HPJ5WhPHdgrtvijATEdDD0N8vU9ZkHZHzbvyVoY+H5mku5XlayUy1A5blYT9J eDAsFK45RBoKNC/kjQI63MRE6vhJGDQvt3zNsDVSZ8de/ZLh1U0AYnUp+vGEUz33BXZo lYuniuh74RFtucaLji2c/MYkjhtoZ3u5Chbm9VzftMD1JbvCRJIIOECdlcihTn1Efuw+ wWZoLMXH9dExbC5DYhklonhFawTlQl2KQ3tHtbcy7fb/G1DegKsD57IFuqDkSkmFb+Yq p/ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LtNWXfYtF0QRQ3OPzxGtzTSnxcr70Cd0EzNL1Ffpow0=; b=0+lWRkSmqSzDseUX9sGH9G0/OPpp/kT+1ctG/kA1wX0dh0gmI19jddjp0P8bcmJ63D +WS+f5Qoqyrdg2nBzLmikKfSYFQczl4LaM34hQhzzV3U8VSEodVKo2kDh+lKraCVXlSH oYRzKJw36VBRvHHwqq8Ufr8zkxcl85ZbaZITSJaTXTex070HPv+W+Qnl7aGRNK7yYmp9 7XBw0hDtNM/cHMrOu80hI0wou8EoYAOTvIcSRLvoqqxDZQu0bt1eb8u8EiPQ+BG5+3iA dv4oR9Ma0PpzVaGUYdyUYIFmUpfFR5TftJ7E/R3NuEj98zAynIf3CpVYPOejVGNqFa9o Vf2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=OA7hDqA1; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h12si2691681ejx.684.2021.04.15.07.56.27; Thu, 15 Apr 2021 07:56:27 -0700 (PDT) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=OA7hDqA1; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233644AbhDOO4s (ORCPT + 12 others); Thu, 15 Apr 2021 10:56:48 -0400 Received: from mail.kernel.org ([198.145.29.99]:38990 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234165AbhDOOzH (ORCPT ); Thu, 15 Apr 2021 10:55:07 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 9A593613F3; Thu, 15 Apr 2021 14:53:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1618498397; bh=ZaDWCu9H6s82FbEVMQ+tbQX/VKvyInyt31NTsUvn0Xc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OA7hDqA1UibzVC6X5iu8T2aTNROSrqWwlFnVsfSidJX0fZ3xcrrWw6CsfIbmuX5Du w7XRTXKSx2SFmPAd9dPh0plQWkMB63YEIl/fKBrwCeamXimC8+mnD1djVmeJn4v6kP TTNGPEGzMt8/tNmKJqZ41PsfIDZ1P0xeIZIOrULQ= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Shengjiu Wang , Charles Keepax , Mark Brown , Sasha Levin Subject: [PATCH 4.14 23/68] ASoC: wm8960: Fix wrong bclk and lrclk with pll enabled for some chips Date: Thu, 15 Apr 2021 16:47:04 +0200 Message-Id: <20210415144415.222490841@linuxfoundation.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210415144414.464797272@linuxfoundation.org> References: <20210415144414.464797272@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Shengjiu Wang [ Upstream commit 16b82e75c15a7dbd564ea3654f3feb61df9e1e6f ] The input MCLK is 12.288MHz, the desired output sysclk is 11.2896MHz and sample rate is 44100Hz, with the configuration pllprescale=2, postscale=sysclkdiv=1, some chip may have wrong bclk and lrclk output with pll enabled in master mode, but with the configuration pllprescale=1, postscale=2, the output clock is correct. >From Datasheet, the PLL performs best when f2 is between 90MHz and 100MHz when the desired sysclk output is 11.2896MHz or 12.288MHz, so sysclkdiv = 2 (f2/8) is the best choice. So search available sysclk_divs from 2 to 1 other than from 1 to 2. Fixes: 84fdc00d519f ("ASoC: codec: wm9860: Refactor PLL out freq search") Signed-off-by: Shengjiu Wang Acked-by: Charles Keepax Link: https://lore.kernel.org/r/1616150926-22892-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- sound/soc/codecs/wm8960.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.30.2 diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 9ed455700954..228ab7bd314d 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -710,7 +710,13 @@ int wm8960_configure_pll(struct snd_soc_codec *codec, int freq_in, best_freq_out = -EINVAL; *sysclk_idx = *dac_idx = *bclk_idx = -1; - for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { + /* + * From Datasheet, the PLL performs best when f2 is between + * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz + * or 12.288MHz, then sysclkdiv = 2 is the best choice. + * So search sysclk_divs from 2 to 1 other than from 1 to 2. + */ + for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) { if (sysclk_divs[i] == -1) continue; for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {