From patchwork Mon Apr 12 08:40:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 419507 Delivered-To: patch@linaro.org Received: by 2002:a02:c4d2:0:0:0:0:0 with SMTP id h18csp1553397jaj; Mon, 12 Apr 2021 01:44:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxHzNGaJKRJuOEgYVI/yM99Df1g4xpgvmldUBHZLnWzAnr8eXpc2btA/zgWOtGt3cOojRgb X-Received: by 2002:a63:f715:: with SMTP id x21mr25363470pgh.399.1618217061681; Mon, 12 Apr 2021 01:44:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618217061; cv=none; d=google.com; s=arc-20160816; b=yq2/U7SFhDT14K4B9YWPQQDnO5Pz3cHf14oJ2d26YDVo7ZeKroWCL5pKLg1VI8mn4V ash49dKjnBL7OS5EpjhZIQJTjozOJ4ZvBVcg24Nh91bSHplfFszK6bQPxlT1CXj9I6Mw Isj5HOTllzlH+KgLSaNSl1i5J7hLbdG8zVY0aCUUZKZUbN7m2NrK53RGKyuoGDf78348 BCpVO3EeA8CzCLBR+KvKTg4muSw8Vs3TvxM+1j9ZYVGLB0BlrFOF6bZW8hV1uX90zWWU VsU/tB/3j+iTL3cO6N9NDl6/XehHXHjmcUbVAzsS26e3FT53tmx2RAXN7CHXW7GoDEpK 5OQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Se04UyNLWNyjT/zA/POwGYFxREk24XpkEsl/3tCd5l0=; b=WU5fMjeaO4u8jb9qQ16HwmIafV17i0cHivRI3CVIr2PL1rxnYwNbRPZfDK5I+24ViV w8Vz96o9KkOjT3cWV5qaUpGBi+iSXFMe3nt6zTQrT0fyEIld/67evGWYInZge4V1nCTF ebWZuPtpHQCsH0ZRHVfTPbeV1GDhpR/Tj0pN1cz1APaKxE/g+OLTcA0x/AX/oC9kbr4X WOwfYBphHJ65ORRnRrlTvdM1A6oOg73bV6d+wY5KvGoGRsmSSqCc3FAg3OorRczl/fzn /4V/eRJI1oW6GxeeM57UVGX011YV2Lq2Tg38sTR1nJonaBPc2LRXPWgk4xvWmTKJyRpH YMsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=2gsvMiuN; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e7si82539pgr.94.2021.04.12.01.44.21; Mon, 12 Apr 2021 01:44:21 -0700 (PDT) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=2gsvMiuN; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237677AbhDLIog (ORCPT + 12 others); Mon, 12 Apr 2021 04:44:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:36412 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237665AbhDLIoW (ORCPT ); Mon, 12 Apr 2021 04:44:22 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 5EE396109E; Mon, 12 Apr 2021 08:44:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1618217045; bh=K7l++CqPG8padr7r6Czqcp9HTLlK7tgJKEVOsOkTFWA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=2gsvMiuNqOq68bxGmOFF+mc/M3v+4ef0+YS/lBs/hfsdiLsm/yh0MvbXaDJriztqB zxxh4fm+V3SfJ0BW7im0t4MzCGDVxCWOK6gqROhzr+2FhIBjw1gpsOm69I5nEk5EQK vxGRCxZAjAgEjS4vSDRwkmdTyo4xZAbCryaI3LQo= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Shengjiu Wang , Charles Keepax , Mark Brown , Sasha Levin Subject: [PATCH 4.19 32/66] ASoC: wm8960: Fix wrong bclk and lrclk with pll enabled for some chips Date: Mon, 12 Apr 2021 10:40:38 +0200 Message-Id: <20210412083959.164654649@linuxfoundation.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210412083958.129944265@linuxfoundation.org> References: <20210412083958.129944265@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Shengjiu Wang [ Upstream commit 16b82e75c15a7dbd564ea3654f3feb61df9e1e6f ] The input MCLK is 12.288MHz, the desired output sysclk is 11.2896MHz and sample rate is 44100Hz, with the configuration pllprescale=2, postscale=sysclkdiv=1, some chip may have wrong bclk and lrclk output with pll enabled in master mode, but with the configuration pllprescale=1, postscale=2, the output clock is correct. >From Datasheet, the PLL performs best when f2 is between 90MHz and 100MHz when the desired sysclk output is 11.2896MHz or 12.288MHz, so sysclkdiv = 2 (f2/8) is the best choice. So search available sysclk_divs from 2 to 1 other than from 1 to 2. Fixes: 84fdc00d519f ("ASoC: codec: wm9860: Refactor PLL out freq search") Signed-off-by: Shengjiu Wang Acked-by: Charles Keepax Link: https://lore.kernel.org/r/1616150926-22892-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- sound/soc/codecs/wm8960.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.30.2 diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index c4c00297ada6..88e869d16714 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -710,7 +710,13 @@ int wm8960_configure_pll(struct snd_soc_component *component, int freq_in, best_freq_out = -EINVAL; *sysclk_idx = *dac_idx = *bclk_idx = -1; - for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { + /* + * From Datasheet, the PLL performs best when f2 is between + * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz + * or 12.288MHz, then sysclkdiv = 2 is the best choice. + * So search sysclk_divs from 2 to 1 other than from 1 to 2. + */ + for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) { if (sysclk_divs[i] == -1) continue; for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {