From patchwork Mon Oct 5 15:26:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 290637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF481C4363A for ; Mon, 5 Oct 2020 15:33:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 72B122074F for ; Mon, 5 Oct 2020 15:33:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601912038; bh=21FkWTn97faQnwphOoikRmtJOI5pXA5VMosofT5D3sU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=cVQv1Sj83TnkMtedepmwbUSz4lu4MXbyTqsTVfrRi3/nIrN+LoBkCQxR9fOZzgYoW VwA8icKiBMfUVzdH6yk8VdJJc2x88cCMlh/obeCEGmCXwi0xgwEK9LgHJ3x+kBivdi hJAEH3uHlPfCa3RN4Q2ZCg8I4+HCf4vB6vuSMTWQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727775AbgJEPd5 (ORCPT ); Mon, 5 Oct 2020 11:33:57 -0400 Received: from mail.kernel.org ([198.145.29.99]:34280 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727591AbgJEPdz (ORCPT ); Mon, 5 Oct 2020 11:33:55 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 03A22206DD; Mon, 5 Oct 2020 15:33:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601912035; bh=21FkWTn97faQnwphOoikRmtJOI5pXA5VMosofT5D3sU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q4nRKZI0ZpILIi9dYAwF9zV8bg1tLpIK0no8r7W2taldllNEKXsa2oy0+vCLef1NB HOjPn5fu8A4xMR7JsFN1JRAYDXbB9RR3vVXH1/0jlwENzTBLkPN14xoSfuzTc7IXRU 0sacXq4MoRcmasGCoOCZnVU3L9rK523ZeuNhdqxo= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Chris Packham , Mark Brown , Sasha Levin Subject: [PATCH 5.8 45/85] spi: fsl-espi: Only process interrupts for expected events Date: Mon, 5 Oct 2020 17:26:41 +0200 Message-Id: <20201005142116.891765621@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201005142114.732094228@linuxfoundation.org> References: <20201005142114.732094228@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Chris Packham [ Upstream commit b867eef4cf548cd9541225aadcdcee644669b9e1 ] The SPIE register contains counts for the TX FIFO so any time the irq handler was invoked we would attempt to process the RX/TX fifos. Use the SPIM value to mask the events so that we only process interrupts that were expected. This was a latent issue exposed by commit 3282a3da25bd ("powerpc/64: Implement soft interrupt replay in C"). Signed-off-by: Chris Packham Link: https://lore.kernel.org/r/20200904002812.7300-1-chris.packham@alliedtelesis.co.nz Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-fsl-espi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c index e60581283a247..6d148ab70b93e 100644 --- a/drivers/spi/spi-fsl-espi.c +++ b/drivers/spi/spi-fsl-espi.c @@ -564,13 +564,14 @@ static void fsl_espi_cpu_irq(struct fsl_espi *espi, u32 events) static irqreturn_t fsl_espi_irq(s32 irq, void *context_data) { struct fsl_espi *espi = context_data; - u32 events; + u32 events, mask; spin_lock(&espi->lock); /* Get interrupt events(tx/rx) */ events = fsl_espi_read_reg(espi, ESPI_SPIE); - if (!events) { + mask = fsl_espi_read_reg(espi, ESPI_SPIM); + if (!(events & mask)) { spin_unlock(&espi->lock); return IRQ_NONE; }