From patchwork Tue Sep 15 14:12:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "gregkh@linuxfoundation.org" X-Patchwork-Id: 263915 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE1E8C43461 for ; Tue, 15 Sep 2020 23:40:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E9C620756 for ; Tue, 15 Sep 2020 23:40:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600213205; bh=PBvaGaNwNglmTL7AQ3XaoTVs0e7wUvUDberY90mcB9M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=1DD3qB9przyWZWpvEeh3EeMRnuWkBcuJh0+BtW///6Y4tk2McOd4aOy+t8p5qrbDZ iEI1HzhUoh9ASL0CQPuxwEvOGIUbyZctu4T3Sf/1mb+dyhpvYam8D3yUHm5gsgE12k rPT6VfC0rHFTePmJT2/mzC0Tv1rpztlUyqu4tJCY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727073AbgIOXj4 (ORCPT ); Tue, 15 Sep 2020 19:39:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:46456 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727123AbgIOOet (ORCPT ); Tue, 15 Sep 2020 10:34:49 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B0442221E5; Tue, 15 Sep 2020 14:15:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600179346; bh=PBvaGaNwNglmTL7AQ3XaoTVs0e7wUvUDberY90mcB9M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RkwfOBwnxqkTgOqrUn1cawdFLRlE+KgAPQ7aiB+eqUn/nQQrQgYsy3AIDGgt2zh0y 3iTGGBab4MrhiuECM8st/H6Z09oIvZSHMajDI++7MHLmLgvcKL6X831XleUHOzOiEJ MdX/o0gpOrTxLt9eyj7HwU+Gb1PLH15xM5By/dKM= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Mohan Kumar , Sameer Pujar , Takashi Iwai , Sasha Levin Subject: [PATCH 4.19 23/78] ALSA: hda: Fix 2 channel swapping for Tegra Date: Tue, 15 Sep 2020 16:12:48 +0200 Message-Id: <20200915140634.715358619@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200915140633.552502750@linuxfoundation.org> References: <20200915140633.552502750@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mohan Kumar [ Upstream commit 216116eae43963c662eb84729507bad95214ca6b ] The Tegra HDA codec HW implementation has an issue related to not swapping the 2 channel Audio Sample Packet(ASP) channel mapping. Whatever the FL and FR mapping specified the left channel always comes out of left speaker and right channel on right speaker. So add condition to disallow the swapping of FL,FR during the playback. Signed-off-by: Mohan Kumar Acked-by: Sameer Pujar Link: https://lore.kernel.org/r/20200825052415.20626-2-mkumard@nvidia.com Signed-off-by: Takashi Iwai Signed-off-by: Sasha Levin --- sound/pci/hda/patch_hdmi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index b8e5f2b19ff85..708efb9b43877 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -3431,6 +3431,7 @@ static int tegra_hdmi_build_pcms(struct hda_codec *codec) static int patch_tegra_hdmi(struct hda_codec *codec) { + struct hdmi_spec *spec; int err; err = patch_generic_hdmi(codec); @@ -3438,6 +3439,10 @@ static int patch_tegra_hdmi(struct hda_codec *codec) return err; codec->patch_ops.build_pcms = tegra_hdmi_build_pcms; + spec = codec->spec; + spec->chmap.ops.chmap_cea_alloc_validate_get_type = + nvhdmi_chmap_cea_alloc_validate_get_type; + spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate; return 0; }