From patchwork Thu Aug 20 09:20:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 265822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EA9EC433E1 for ; Thu, 20 Aug 2020 09:41:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D87E0208E4 for ; Thu, 20 Aug 2020 09:41:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597916478; bh=U4KrGCQb7/GOL6p3/wipQV9B3LdWGiw+bPEaYyFKaq0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=nbnMAYPOhykOKPxaJEAbDaFgGNtK9+8k1lFv0do3CYQHherEI5gFj+ghiKQGWDr9F 8IlBPWPcmomkLP/Ui+Z0u/wCT7tWhVCHVdcRYHCqYJmO7TM4UiF/Lc8JdScRCvoUKn py97NR9qETrsUfojN/tIuAEFB+sRFtO8VGke0aQI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728664AbgHTJlM (ORCPT ); Thu, 20 Aug 2020 05:41:12 -0400 Received: from mail.kernel.org ([198.145.29.99]:34252 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727033AbgHTJlK (ORCPT ); Thu, 20 Aug 2020 05:41:10 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D270E207DE; Thu, 20 Aug 2020 09:41:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597916470; bh=U4KrGCQb7/GOL6p3/wipQV9B3LdWGiw+bPEaYyFKaq0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KfwSal5CkFrNqzsxH74HX4yWfs4UYEkljw6mFh43mO8VDw0OgGoBUB9PfXTjUTgoI Qb0izUa26NoXmTEgSYxbu1GHlXX6+uwLRr1UtWWUVgCiE3SmillTNoGNa0LWIrkg4L eKHU7A/01yJYjtFg4e9LCofJy9RTR3ABxbO36TKw= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Liu Yi L , Jacob Pan , Lu Baolu , Eric Auger , Joerg Roedel , Sasha Levin Subject: [PATCH 5.7 140/204] iommu/vt-d: Enforce PASID devTLB field mask Date: Thu, 20 Aug 2020 11:20:37 +0200 Message-Id: <20200820091613.248324405@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200820091606.194320503@linuxfoundation.org> References: <20200820091606.194320503@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Liu Yi L [ Upstream commit 5f77d6ca5ca74e4b4a5e2e010f7ff50c45dea326 ] Set proper masks to avoid invalid input spillover to reserved bits. Signed-off-by: Liu Yi L Signed-off-by: Jacob Pan Signed-off-by: Lu Baolu Reviewed-by: Eric Auger Link: https://lore.kernel.org/r/20200724014925.15523-2-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel Signed-off-by: Sasha Levin --- include/linux/intel-iommu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 64a5335046b00..bc1abbc041092 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -363,8 +363,8 @@ enum { #define QI_DEV_EIOTLB_ADDR(a) ((u64)(a) & VTD_PAGE_MASK) #define QI_DEV_EIOTLB_SIZE (((u64)1) << 11) -#define QI_DEV_EIOTLB_GLOB(g) ((u64)g) -#define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32) +#define QI_DEV_EIOTLB_GLOB(g) ((u64)(g) & 0x1) +#define QI_DEV_EIOTLB_PASID(p) ((u64)((p) & 0xfffff) << 32) #define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16) #define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4) #define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \