From patchwork Mon Aug 17 15:13:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 265971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F26B0C433E3 for ; Mon, 17 Aug 2020 19:35:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DA99D2065D for ; Mon, 17 Aug 2020 19:35:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597692909; bh=13F+ddTNTR2GbhipCI3zXN9mb1ex9kWBJSrBb6HSN3Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=BCdt1BkNiE+xHhf+c7DnFKX7Nb8rIBhaEyDIaU7IAAHNGE7zPwfH8p+gAOmx83cn+ ahWBn4gJCj+/sy/0MAwplY/RU4cuL9I5KQlO5C9Rk3xNhTgukdXtTQM+BB/q9Jj/5r nGXHRkm8A7+hjl6NxAEn2zRKUvHol3QQpByeXrzs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730122AbgHQP3m (ORCPT ); Mon, 17 Aug 2020 11:29:42 -0400 Received: from mail.kernel.org ([198.145.29.99]:48874 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730118AbgHQP3l (ORCPT ); Mon, 17 Aug 2020 11:29:41 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E1FD82395B; Mon, 17 Aug 2020 15:29:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597678180; bh=13F+ddTNTR2GbhipCI3zXN9mb1ex9kWBJSrBb6HSN3Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pSwrVtYhMvjNA6mbz+jLpA6pGn/W5L5GgWP68vtaFkb1G0+8DW6C8Ju7hcwiimV/g 91v2XQhzNZR3S/85S335WH4nNRmpm9xbXmzkDs4hGmBqVFsgu/cSCzuDFnY3mWO7u7 WeVuiMrzeCuQNV3zXd0QizMpHl5s4fcAWcRJISLs= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Colin Ian King , Sasha Levin Subject: [PATCH 5.8 245/464] staging: rtl8192u: fix a dubious looking mask before a shift Date: Mon, 17 Aug 2020 17:13:18 +0200 Message-Id: <20200817143845.533077201@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200817143833.737102804@linuxfoundation.org> References: <20200817143833.737102804@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Colin Ian King [ Upstream commit c4283950a9a4d3bf4a3f362e406c80ab14f10714 ] Currently the masking of ret with 0xff and followed by a right shift of 8 bits always leaves a zero result. It appears the mask of 0xff is incorrect and should be 0xff00, but I don't have the hardware to test this. Fix this to mask the upper 8 bits before shifting. [ Not tested ] Addresses-Coverity: ("Operands don't affect result") Fixes: 8fc8598e61f6 ("Staging: Added Realtek rtl8192u driver to staging") Signed-off-by: Colin Ian King Link: https://lore.kernel.org/r/20200716154720.1710252-1-colin.king@canonical.com Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- drivers/staging/rtl8192u/r8192U_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c index fcfb9024a83f0..6ec65187bef91 100644 --- a/drivers/staging/rtl8192u/r8192U_core.c +++ b/drivers/staging/rtl8192u/r8192U_core.c @@ -2374,7 +2374,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) ret = eprom_read(dev, (EEPROM_TX_PW_INDEX_CCK >> 1)); if (ret < 0) return ret; - priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff) >> 8; + priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff00) >> 8; } else priv->EEPROMTxPowerLevelCCK = 0x10; RT_TRACE(COMP_EPROM, "CCK Tx Power Levl: 0x%02x\n", priv->EEPROMTxPowerLevelCCK);