From patchwork Mon Aug 17 15:09:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 247878 Delivered-To: patch@linaro.org Received: by 2002:a54:3b12:0:0:0:0:0 with SMTP id j18csp2600064ect; Mon, 17 Aug 2020 12:50:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw64kQKL+FUIjDmqj2ah5p9ltTqViM3oYwSVvJoOmLmfl0lEjOeENpWHXf9NQHWWGD5UNZp X-Received: by 2002:a05:6402:17bb:: with SMTP id j27mr15940155edy.291.1597693809313; Mon, 17 Aug 2020 12:50:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1597693809; cv=none; d=google.com; s=arc-20160816; b=XIaX55XUIxxRyv5XRTRVxuVSEyf5tZce0TOy5vQC8bWUtdS80fdoKsQzFGK+RNBmFc 0g59dKHLrdPIkaSq3247pFG99vvC/HhFjbOsSfn8dlF8xn6N9u53kgW1+RFgspFrCJiQ k+flfjF6YCUWOpr2EdvFljqSPAY/a/V0Al1BZmKbqdmTZByMUHg1wD1P9oeZ8orstrAa 82dzY7S9p8kOnwzINMbfZ2M0zdzyO5nv8n1lsQhcgXb4k/R5az6D16Vhwv+3zHR/+MmX kygciARR1KtEwOAzwfZ8AeYwF6iAhkti4m8x2Ko9lzHUWU/3v52GMd6FZ0egqyTXy/BR 8prQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ou7rZfZe7AFWOz+CZGqIqVteq6eI/RuNBxwRb2VP08A=; b=DSymYkrGRyK85dJE987sQQ8Hs7Sn8WOrsJVqiQhDoQs5JkrgwqIQJhd7Ov4cJdcuP4 wYuRB/GehxncZXvJ6v98oBVmV6wQ9xU8YaDnAHMqoeXHlGTklVFaDqJwiXHHfjpskapu C/Gp9TrO9OG52x+GS6eun9NtT4RPgnp3Opw7xhg/A0pX+xqbWuXUv5m9nAdYHsfY9JcS YoScnp5sho7MYUevDjRXbCkCPW/5wAhe7P0RGL0RAV24h2rch9iXACl2z2qXyoAn9e8A R+qtt0H7kfZHG2FcKljqsbvNanH6H51VJKl6k9H2G5Ow5EgrmOIUIi6YigKBY6imkXh1 Oi9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Py+ppD5F; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id qw15si12222900ejb.481.2020.08.17.12.50.09; Mon, 17 Aug 2020 12:50:09 -0700 (PDT) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Py+ppD5F; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404420AbgHQTuI (ORCPT + 15 others); Mon, 17 Aug 2020 15:50:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:41132 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729231AbgHQPTe (ORCPT ); Mon, 17 Aug 2020 11:19:34 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E3B4F206FA; Mon, 17 Aug 2020 15:19:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597677573; bh=5FS1bRYbhh3iZG9BJtPW8I/Q7cLQiRbWaIwY811DndM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Py+ppD5F426rVQ2SJEi5AHZz3TpNBg4/oNMBNy8uuhanCzD37pJUM3eiAdJ+ZT8LB tR3W9CX3QgaYBOZOwp+K4bnwgANSKkz+TsY5DPsunSbFg7Q1Evlooru4NPXNxdu0z2 la2kYq9NYBADfQOYPVpWDVZJfspvRlFBhSOubPSA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Stephen Boyd , Sudeep Holla , Sasha Levin , Dien Pham Subject: [PATCH 5.8 031/464] clk: scmi: Fix min and max rate when registering clocks with discrete rates Date: Mon, 17 Aug 2020 17:09:44 +0200 Message-Id: <20200817143835.248900470@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200817143833.737102804@linuxfoundation.org> References: <20200817143833.737102804@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Sudeep Holla [ Upstream commit fcd2e0deae50bce48450f14c8fc5611b08d7438c ] Currently we are not initializing the scmi clock with discrete rates correctly. We fetch the min_rate and max_rate value only for clocks with ranges and ignore the ones with discrete rates. This will lead to wrong initialization of rate range when clock supports discrete rate. Fix this by using the first and the last rate in the sorted list of the discrete clock rates while registering the clock. Link: https://lore.kernel.org/r/20200709081705.46084-2-sudeep.holla@arm.com Fixes: 6d6a1d82eaef7 ("clk: add support for clocks provided by SCMI") Reviewed-by: Stephen Boyd Reported-and-tested-by: Dien Pham Signed-off-by: Sudeep Holla Signed-off-by: Sasha Levin --- drivers/clk/clk-scmi.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) -- 2.25.1 diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index c491f5de0f3f4..c754dfbb73fd4 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -103,6 +103,8 @@ static const struct clk_ops scmi_clk_ops = { static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk) { int ret; + unsigned long min_rate, max_rate; + struct clk_init_data init = { .flags = CLK_GET_RATE_NOCACHE, .num_parents = 0, @@ -112,9 +114,23 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk) sclk->hw.init = &init; ret = devm_clk_hw_register(dev, &sclk->hw); - if (!ret) - clk_hw_set_rate_range(&sclk->hw, sclk->info->range.min_rate, - sclk->info->range.max_rate); + if (ret) + return ret; + + if (sclk->info->rate_discrete) { + int num_rates = sclk->info->list.num_rates; + + if (num_rates <= 0) + return -EINVAL; + + min_rate = sclk->info->list.rates[0]; + max_rate = sclk->info->list.rates[num_rates - 1]; + } else { + min_rate = sclk->info->range.min_rate; + max_rate = sclk->info->range.max_rate; + } + + clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate); return ret; }