From patchwork Tue Jun 23 19:53:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 223092 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEDC6C433E1 for ; Tue, 23 Jun 2020 21:36:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CE8EB2072E for ; Tue, 23 Jun 2020 21:36:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592948198; bh=5gGEF0Ydk+b3Y5uVUciFyjnL6r/+t7Vq/dqnuzJO1J4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=UpdTF1yQQqTKONsjLDLVh7+q3sOG7WYqzLUIgCoiW3qoYsCPXu916JCIiQVbheSRf aKrRFUFUdjvckwJ0IovdZLg63og5XNhdM8MS8nJGluvAbSg2jhcVmAwuYX3qMiIUy3 VD6huTzjDCdbTUG6OjRTBqlJTQuvRrjx8WUSGUgo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388291AbgFWVgZ (ORCPT ); Tue, 23 Jun 2020 17:36:25 -0400 Received: from mail.kernel.org ([198.145.29.99]:51104 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388768AbgFWUJ4 (ORCPT ); Tue, 23 Jun 2020 16:09:56 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EF0772078A; Tue, 23 Jun 2020 20:09:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592942995; bh=5gGEF0Ydk+b3Y5uVUciFyjnL6r/+t7Vq/dqnuzJO1J4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=p81Qy+6HflgmhAOdXU8kVIYiBI/EGk2ELdNZycLNXS018E2AbGq4PdhRnSwMwuQTS seFu4EpsTpHEOwsIzjkGRE3fXFdBDtsczMsG/ld2fidmylzQjKXW27lgfUCIua9puf exgwl6IhI0ASiExR45l0av75GuxHY23ZcJeVqj/I= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Tomasz Maciej Nowak , =?utf-8?q?Pali_Roh=C3=A1r?= , Lorenzo Pieralisi , Rob Herring , Thomas Petazzoni , Sasha Levin Subject: [PATCH 5.7 218/477] PCI: aardvark: Train link immediately after enabling training Date: Tue, 23 Jun 2020 21:53:35 +0200 Message-Id: <20200623195417.891038691@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200623195407.572062007@linuxfoundation.org> References: <20200623195407.572062007@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár [ Upstream commit 6964494582f56a3882c2c53b0edbfe99eb32b2e1 ] Adding even 100ms (PCI_PM_D3COLD_WAIT) delay between enabling link training and starting link training causes detection issues with some buggy cards (such as Compex WLE900VX). Move the code which enables link training immediately before the one which starts link traning. This fixes detection issues of Compex WLE900VX card on Turris MOX after cold boot. Link: https://lore.kernel.org/r/20200430080625.26070-2-pali@kernel.org Fixes: f4c7d053d7f7 ("PCI: aardvark: Wait for endpoint to be ready...") Tested-by: Tomasz Maciej Nowak Signed-off-by: Pali Rohár Signed-off-by: Lorenzo Pieralisi Acked-by: Rob Herring Acked-by: Thomas Petazzoni Signed-off-by: Sasha Levin --- drivers/pci/controller/pci-aardvark.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 3a6d07dc0a385..74b90940a9d46 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -300,11 +300,6 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) reg |= LANE_COUNT_1; advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); - /* Enable link training */ - reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); - reg |= LINK_TRAINING_EN; - advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); - /* Enable MSI */ reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); reg |= PCIE_CORE_CTRL2_MSI_ENABLE; @@ -346,7 +341,15 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) */ msleep(PCI_PM_D3COLD_WAIT); - /* Start link training */ + /* Enable link training */ + reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); + reg |= LINK_TRAINING_EN; + advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); + + /* + * Start link training immediately after enabling it. + * This solves problems for some buggy cards. + */ reg = advk_readl(pcie, PCIE_CORE_LINK_CTRL_STAT_REG); reg |= PCIE_CORE_LINK_TRAINING; advk_writel(pcie, reg, PCIE_CORE_LINK_CTRL_STAT_REG);