From patchwork Tue Jun 23 15:58:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 223598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC177C433E0 for ; Tue, 23 Jun 2020 15:59:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B6FA52073E for ; Tue, 23 Jun 2020 15:59:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=poorly.run header.i=@poorly.run header.b="WUfnEQy+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732978AbgFWP7R (ORCPT ); Tue, 23 Jun 2020 11:59:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731616AbgFWP7R (ORCPT ); Tue, 23 Jun 2020 11:59:17 -0400 Received: from mail-qt1-x844.google.com (mail-qt1-x844.google.com [IPv6:2607:f8b0:4864:20::844]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1AECC061573 for ; Tue, 23 Jun 2020 08:59:16 -0700 (PDT) Received: by mail-qt1-x844.google.com with SMTP id h23so8649180qtr.0 for ; Tue, 23 Jun 2020 08:59:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=poorly.run; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kJ120ZleeYGTsN7eiqCpwfA4QDn1pZXHzj86kixHG3s=; b=WUfnEQy+z9Ih4toq/e7ASl1hJ/8deunM3zEaJ91UBXg78HTHkc/03VvwwuzbAX/Qim YUeujnlD+mOqOKchNPXJzYK52Jual04OHGG6Ebnh0irRrHWBOhPZhNsA59Ne5w6wkYrN dzJ/JPSRJf2AdwsH2Xob2M6N0KE0qpj3jk+R1QIwkHI8EnqMLPknn7HTxSPEwro9pgJT O2PgttFyjw2fFybI4ujp73cFZLGyJAo0dGxGL1xrkPLGI5F5iOKWqn3CsgNhWE4oUK+E 4V2XWH+WQ0BJV8oplFLLd5HR7Y6y8892eyrssrjpA7TzyXpkIOi0FLPnis8orn6oB/Gl 7hCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kJ120ZleeYGTsN7eiqCpwfA4QDn1pZXHzj86kixHG3s=; b=uUY0U+Mr/ZiHCZf+Z5EUFyxOFiFMjB5ydXSeLa0jXlxfN4U0cctu+2XlnT8CqMZ6Of HinazLZJY4kAMxk1f34BqEAK3fW+Bz21CFO+1I4G3Yop29/3hnnhyDCn6I7YozNHjjTK 25li6g6kgIL31aTewG4Yv1eEKJL1zFJuMlRa37Ag8toaRqXig8CYrPChmsooVKpdpfIV 765XRIMlV7sFy8qNlgEjNcTk+TGJu2iL88HI/LEbfz5qKZvEtQodlvr/mDphB2uVZ6Zw 83ZJ5Mxrmt9x2e2rJMhWw7LF7fZ2dqRqX5I9u+TPVNPdiyKaHDIy8S8DXrf/aA7N+9Ed 8TkA== X-Gm-Message-State: AOAM530y8nu9aD2niYhp+OjUfrWHSJcEO9un6m+ADatem0KCYqRelVTV YKO3HJUna1sbAm/2V1kk8zb2nw== X-Google-Smtp-Source: ABdhPJxV4N7qihFKaXEaTJZyEc6mCcdXkxOIB2BpDlH89faOMH/E9ThSB98xx6bqYb35MlRUSAq8vg== X-Received: by 2002:ac8:4d4c:: with SMTP id x12mr22935035qtv.39.1592927955952; Tue, 23 Jun 2020 08:59:15 -0700 (PDT) Received: from localhost ([166.137.96.174]) by smtp.gmail.com with ESMTPSA id a15sm876450qkl.20.2020.06.23.08.59.15 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 23 Jun 2020 08:59:15 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: juston.li@intel.com, ramalingam.c@intel.com, ville.syrjala@linux.intel.com, jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, daniel.vetter@ffwll.ch, Sean Paul , Chris Wilson , stable@vger.kernel.org Subject: [PATCH v7 01/17] drm/i915: Fix sha_text population code Date: Tue, 23 Jun 2020 11:58:51 -0400 Message-Id: <20200623155907.22961-2-sean@poorly.run> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200623155907.22961-1-sean@poorly.run> References: <20200623155907.22961-1-sean@poorly.run> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Sean Paul This patch fixes a few bugs: 1- We weren't taking into account sha_leftovers when adding multiple ksvs to sha_text. As such, we were or'ing the end of ksv[j - 1] with the beginning of ksv[j] 2- In the sha_leftovers == 2 and sha_leftovers == 3 case, bstatus was being placed on the wrong half of sha_text, overlapping the leftover ksv value 3- In the sha_leftovers == 2 case, we need to manually terminate the byte stream with 0x80 since the hardware doesn't have enough room to add it after writing M0 The upside is that all of the HDCP supported HDMI repeaters I could find on Amazon just strip HDCP anyways, so it turns out to be _really_ hard to hit any of these cases without an MST hub, which is not (yet) supported. Oh, and the sha_leftovers == 1 case works perfectly! Fixes: ee5e5e7a5e0f (drm/i915: Add HDCP framework + base implementation) Cc: Chris Wilson Cc: Ramalingam C Cc: Daniel Vetter Cc: Sean Paul Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: intel-gfx@lists.freedesktop.org Cc: # v4.17+ Reviewed-by: Ramalingam C Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-2-sean@poorly.run #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20191212190230.188505-2-sean@poorly.run #v2 Link: https://patchwork.freedesktop.org/patch/msgid/20200117193103.156821-2-sean@poorly.run #v3 Link: https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-2-sean@poorly.run #v4 Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-2-sean@poorly.run #v5 Link: https://patchwork.freedesktop.org/patch/msgid/20200429195502.39919-2-sean@poorly.run #v6 Changes in v2: -None Changes in v3: -None Changes in v4: -Rebased on intel_de_write changes Changes in v5: -None Changes in v6: -None Changes in v7: -None --- drivers/gpu/drm/i915/display/intel_hdcp.c | 26 +++++++++++++++++------ include/drm/drm_hdcp.h | 3 +++ 2 files changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 815b054bb167..f26fee3b4624 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -336,8 +336,10 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector, /* Fill up the empty slots in sha_text and write it out */ sha_empty = sizeof(sha_text) - sha_leftovers; - for (j = 0; j < sha_empty; j++) - sha_text |= ksv[j] << ((sizeof(sha_text) - j - 1) * 8); + for (j = 0; j < sha_empty; j++) { + u8 off = ((sizeof(sha_text) - j - 1 - sha_leftovers) * 8); + sha_text |= ksv[j] << off; + } ret = intel_write_sha_text(dev_priv, sha_text); if (ret < 0) @@ -435,7 +437,7 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector, /* Write 32 bits of text */ intel_de_write(dev_priv, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32); - sha_text |= bstatus[0] << 24 | bstatus[1] << 16; + sha_text |= bstatus[0] << 8 | bstatus[1]; ret = intel_write_sha_text(dev_priv, sha_text); if (ret < 0) return ret; @@ -450,17 +452,29 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector, return ret; sha_idx += sizeof(sha_text); } + + /* + * Terminate the SHA-1 stream by hand. For the other leftover + * cases this is appended by the hardware. + */ + intel_de_write(dev_priv, HDCP_REP_CTL, + rep_ctl | HDCP_SHA1_TEXT_32); + sha_text = DRM_HDCP_SHA1_TERMINATOR << 24; + ret = intel_write_sha_text(dev_priv, sha_text); + if (ret < 0) + return ret; + sha_idx += sizeof(sha_text); } else if (sha_leftovers == 3) { - /* Write 32 bits of text */ + /* Write 32 bits of text (filled from LSB) */ intel_de_write(dev_priv, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32); - sha_text |= bstatus[0] << 24; + sha_text |= bstatus[0]; ret = intel_write_sha_text(dev_priv, sha_text); if (ret < 0) return ret; sha_idx += sizeof(sha_text); - /* Write 8 bits of text, 24 bits of M0 */ + /* Write 8 bits of text (filled from LSB), 24 bits of M0 */ intel_de_write(dev_priv, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_8); ret = intel_write_sha_text(dev_priv, bstatus[1]); diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index c6bab4986a65..fe58dbb46962 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -29,6 +29,9 @@ /* Slave address for the HDCP registers in the receiver */ #define DRM_HDCP_DDC_ADDR 0x3A +/* Value to use at the end of the SHA-1 bytestream used for repeaters */ +#define DRM_HDCP_SHA1_TERMINATOR 0x80 + /* HDCP register offsets for HDMI/DVI devices */ #define DRM_HDCP_DDC_BKSV 0x00 #define DRM_HDCP_DDC_RI_PRIME 0x08