From patchwork Fri Jun 19 14:33:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 223817 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0D71C433E0 for ; Fri, 19 Jun 2020 16:19:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9180121707 for ; Fri, 19 Jun 2020 16:19:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592583589; bh=Bavk9QbyY+cBR5Q37haU6BSR4Badx9cgk1Oa4nFKzzI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=C9bsVNTeIycPPGooYpv2gmd1jkbOyLe/ELTNkenWgV5twZLBu6wrVRWGnYM2m/qNV fPJFhhTuCE8j851xSnBRdlOP7TF42MdMF41kUrP4c+udjZNZ5tx5Kp5ACDvefsq9cm id4Jih3lck3f20dCkT3+ncMeqNSQLV9p1y0KD734= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390938AbgFSQTs (ORCPT ); Fri, 19 Jun 2020 12:19:48 -0400 Received: from mail.kernel.org ([198.145.29.99]:58168 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389657AbgFSPBp (ORCPT ); Fri, 19 Jun 2020 11:01:45 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4A60920734; Fri, 19 Jun 2020 15:01:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592578905; bh=Bavk9QbyY+cBR5Q37haU6BSR4Badx9cgk1Oa4nFKzzI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rKjFqojThTZMkGaJ7VH3CnOgSN6weQMU8a72zKzvs8vzpzPuEZBr9CzpP6Z5vj9Tp M/NCLtYXLYCOLBMb9Vac/uIbsgoiOPv4IXn1cbUBdZocSwCPaSvw56RM5qbgJRJ02m DqzGyG3PeRGK7JcVYZ4lQBYi/GP0K2fxfCoAmpM4= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Abhinav Ratna , Srinath Mannam , Bjorn Helgaas , Scott Branden , Sasha Levin Subject: [PATCH 4.19 202/267] PCI: Add ACS quirk for iProc PAXB Date: Fri, 19 Jun 2020 16:33:07 +0200 Message-Id: <20200619141658.429157336@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200619141648.840376470@linuxfoundation.org> References: <20200619141648.840376470@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Abhinav Ratna [ Upstream commit 46b2c32df7a462d0e64b68c513e5c4c1b2a399a7 ] iProc PAXB Root Ports don't advertise an ACS capability, but they do not allow peer-to-peer transactions between Root Ports. Add an ACS quirk so each Root Port can be in a separate IOMMU group. [bhelgaas: commit log, comment, use common implementation style] Link: https://lore.kernel.org/r/1566275985-25670-1-git-send-email-srinath.mannam@broadcom.com Signed-off-by: Abhinav Ratna Signed-off-by: Srinath Mannam Signed-off-by: Bjorn Helgaas Acked-by: Scott Branden Signed-off-by: Sasha Levin --- drivers/pci/quirks.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 92892b1c35fa..013b84880e1d 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4543,6 +4543,19 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) return acs_flags ? 0 : 1; } +static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags) +{ + /* + * iProc PAXB Root Ports don't advertise an ACS capability, but + * they do not allow peer-to-peer transactions between Root Ports. + * Allow each Root Port to be in a separate IOMMU group by masking + * SV/RR/CR/UF bits. + */ + acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); + + return acs_flags ? 0 : 1; +} + static const struct pci_dev_acs_enabled { u16 vendor; u16 device; @@ -4634,6 +4647,7 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs }, { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs }, { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs }, + { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs }, { 0 } };