From patchwork Fri Jun 5 14:15:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 224791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92E9DC433DF for ; Fri, 5 Jun 2020 14:19:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 71D43208C3 for ; Fri, 5 Jun 2020 14:19:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1591366779; bh=MYJqfoYIbEzY1UIFb/rjRLJvQvUWngWnN24BHuAkXuQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=IMbCqBM7rPvZvEkzBrYyHuoidHhz43bOPhUj0Zh0wpjFZrvn2pf28NTZPsR3+BZat XRsyT9eZDzWDmoqISKHndUmLipRrgooWsf3AyR194fr9TMBPOGnll9R99rLwf343ec iHjSd8lZ2EfP1rZ1HWaszEN68Xauzh26CseP2TqM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728290AbgFEOTi (ORCPT ); Fri, 5 Jun 2020 10:19:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:50464 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728846AbgFEOTf (ORCPT ); Fri, 5 Jun 2020 10:19:35 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AF078208A9; Fri, 5 Jun 2020 14:19:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1591366774; bh=MYJqfoYIbEzY1UIFb/rjRLJvQvUWngWnN24BHuAkXuQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kQpmU2EDQ8G6iT2ratAgjJWDELIkZ/AOFUKkkjtB5/47ToXXAKwxp6uVLEO7hdjiJ 6H3nWzaNdF4NmcaHqIVzOPSmD44AQIlpwSSECACOrAn0UQQ9hAlPLV+8O+FdKSaAuB v5AHV1kSh9ottvVQU9rNWwfzKQBNMYwUnQ1Bruao= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Lucas De Marchi , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , Sasha Levin Subject: [PATCH 4.19 12/28] drm/i915: fix port checks for MST support on gen >= 11 Date: Fri, 5 Jun 2020 16:15:14 +0200 Message-Id: <20200605140253.085150761@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200605140252.338635395@linuxfoundation.org> References: <20200605140252.338635395@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Lucas De Marchi [ Upstream commit 10d987fd1b7baceaafa78d805e71427ab735b4e4 ] Both Ice Lake and Elkhart Lake (gen 11) support MST on all external connections except DDI A. Tiger Lake (gen 12) supports on all external connections. Move the check to happen inside intel_dp_mst_encoder_init() and add specific platform checks. v2: Replace != with == checks for ports on gen < 11 (Ville) Signed-off-by: Lucas De Marchi Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20191015164029.18431-3-lucas.demarchi@intel.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/i915/intel_dp.c | 7 ++----- drivers/gpu/drm/i915/intel_dp_mst.c | 22 ++++++++++++++++------ 2 files changed, 18 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 20cd4c8acecc..77a2f7fc2b37 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -6288,11 +6288,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, intel_connector->get_hw_state = intel_connector_get_hw_state; /* init MST on ports that can support it */ - if (HAS_DP_MST(dev_priv) && !intel_dp_is_edp(intel_dp) && - (port == PORT_B || port == PORT_C || - port == PORT_D || port == PORT_F)) - intel_dp_mst_encoder_init(intel_dig_port, - intel_connector->base.base.id); + intel_dp_mst_encoder_init(intel_dig_port, + intel_connector->base.base.id); if (!intel_edp_init_connector(intel_dp, intel_connector)) { intel_dp_aux_fini(intel_dp); diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index 58ba14966d4f..c7d52c66ff29 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -588,21 +588,31 @@ intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) { + struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); struct intel_dp *intel_dp = &intel_dig_port->dp; - struct drm_device *dev = intel_dig_port->base.base.dev; + enum port port = intel_dig_port->base.port; int ret; - intel_dp->can_mst = true; + if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp)) + return 0; + + if (INTEL_GEN(i915) < 12 && port == PORT_A) + return 0; + + if (INTEL_GEN(i915) < 11 && port == PORT_E) + return 0; + intel_dp->mst_mgr.cbs = &mst_cbs; /* create encoders */ intel_dp_create_fake_mst_encoders(intel_dig_port); - ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev, + ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm, &intel_dp->aux, 16, 3, conn_base_id); - if (ret) { - intel_dp->can_mst = false; + if (ret) return ret; - } + + intel_dp->can_mst = true; + return 0; }