From patchwork Mon May 18 17:36:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 225783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6C96C433DF for ; Mon, 18 May 2020 17:57:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 88ED220674 for ; Mon, 18 May 2020 17:57:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589824649; bh=u9Dmuq/K6ryDJMtzgJQEABHCn0tfGryZO0R5fm4zHtk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=x7xsxfvGNCa69iq/dtbxBrgmwRy05g+OWH4hk/cJgBwgmf1DaA3YNsjp6My3cVXgF 1F3eE9whPuaanb/yEl1Mq7zfUgV9nzlRW91H8CELNseqtTScvpKt0TBFx1FGgZHbe7 zDhSDE0Osu/v7k/yMrBSTuueuO91a/9A2yVSws0w= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730950AbgERR52 (ORCPT ); Mon, 18 May 2020 13:57:28 -0400 Received: from mail.kernel.org ([198.145.29.99]:36098 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731791AbgERR52 (ORCPT ); Mon, 18 May 2020 13:57:28 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1E76B20674; Mon, 18 May 2020 17:57:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589824647; bh=u9Dmuq/K6ryDJMtzgJQEABHCn0tfGryZO0R5fm4zHtk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bl+bgb47g1si813xS79UDlBTQmwDHNmKeqUNMmzdp79NfWXE54TK4K74lRFAfBEV6 Mj11z2oC4e/3YnrCFKk5xjqJQadQTsZDfbscsRdw4G6idXnC048/lyYQ0+Whk/nZRd v0iMOMQx+EsO3Q96jNzUtJLO8gdtZ7czTlXNzJC0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Xiong Zhang , Zhenyu Wang , Sasha Levin Subject: [PATCH 5.4 078/147] drm/i915/gvt: Fix kernel oops for 3-level ppgtt guest Date: Mon, 18 May 2020 19:36:41 +0200 Message-Id: <20200518173523.488172832@linuxfoundation.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200518173513.009514388@linuxfoundation.org> References: <20200518173513.009514388@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Zhenyu Wang [ Upstream commit 72a7a9925e2beea09b109dffb3384c9bf920d9da ] As i915 won't allocate extra PDP for current default PML4 table, so for 3-level ppgtt guest, we would hit kernel pointer access failure on extra PDP pointers. So this trys to bypass that now. It won't impact real shadow PPGTT setup, so guest context still works. This is verified on 4.15 guest kernel with i915.enable_ppgtt=1 to force on old aliasing ppgtt behavior. Fixes: 4f15665ccbba ("drm/i915: Add ppgtt to GVT GEM context") Reviewed-by: Xiong Zhang Signed-off-by: Zhenyu Wang Link: http://patchwork.freedesktop.org/patch/msgid/20200506095918.124913-1-zhenyuw@linux.intel.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/i915/gvt/scheduler.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 6c79d16b381ea..058dcd5416440 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c @@ -374,7 +374,11 @@ static void set_context_ppgtt_from_shadow(struct intel_vgpu_workload *workload, for (i = 0; i < GVT_RING_CTX_NR_PDPS; i++) { struct i915_page_directory * const pd = i915_pd_entry(ppgtt->pd, i); - + /* skip now as current i915 ppgtt alloc won't allocate + top level pdp for non 4-level table, won't impact + shadow ppgtt. */ + if (!pd) + break; px_dma(pd) = mm->ppgtt_mm.shadow_pdps[i]; } }