From patchwork Fri May 1 13:22:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 226650 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE2B6C47253 for ; Fri, 1 May 2020 13:36:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B90FA216FD for ; Fri, 1 May 2020 13:36:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588340178; bh=ebTXTMAiuQYreJ+FNcCcQwnLRxKRgHHsao4/s8uB/xE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=BnMYQD/jq54UH8CNTD4Q3914XprbcZfpncHjxl3kVVp3RP805G3e6b7fD3E6KGJVz 0KcFd4PNI90TclvYRMGfQzglfO0gfzBckNHro9thdc+ImmfgloMGW5lOT1jq0viey+ WYWB2xB5Z4LeVyR2Qrsn0AyGuwrtSeZt7ESglvUM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730826AbgEANgR (ORCPT ); Fri, 1 May 2020 09:36:17 -0400 Received: from mail.kernel.org ([198.145.29.99]:34684 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730843AbgEANgQ (ORCPT ); Fri, 1 May 2020 09:36:16 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5EBEC24955; Fri, 1 May 2020 13:36:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588340175; bh=ebTXTMAiuQYreJ+FNcCcQwnLRxKRgHHsao4/s8uB/xE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RsHuz5VsEfmmovnFQQCZ+9G+vOZEr/YgKLCRq6qYsZJoIwEaZJAxSIVJPk3Pgx/Y/ PZ7iAyMtOGUAVDB6t+RuqgbMj7QZn8BfMg8zc6X20hCwegSNItoCKkFpXiE8XzJC21 j1O1GltWEjCtA4bEXYHAOn++Ey/fXZhmuVnc+dqE= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, =?utf-8?q?Lu=C3=ADs_Mendes?= , Bjorn Helgaas , Todd Poynor Subject: [PATCH 4.19 19/46] PCI: Move Apex Edge TPU class quirk to fix BAR assignment Date: Fri, 1 May 2020 15:22:44 +0200 Message-Id: <20200501131505.458526200@linuxfoundation.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200501131457.023036302@linuxfoundation.org> References: <20200501131457.023036302@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Bjorn Helgaas commit 0a8f41023e8a3c100b3dc458ed2da651bf961ead upstream. Some Google Apex Edge TPU devices have a class code of 0 (PCI_CLASS_NOT_DEFINED). This prevents the PCI core from assigning resources for the Apex BARs because __dev_sort_resources() ignores classless devices, host bridges, and IOAPICs. On x86, firmware typically assigns those resources, so this was not a problem. But on some architectures, firmware does *not* assign BARs, and since the PCI core didn't do it either, the Apex device didn't work correctly: apex 0000:01:00.0: can't enable device: BAR 0 [mem 0x00000000-0x00003fff 64bit pref] not claimed apex 0000:01:00.0: error enabling PCI device f390d08d8b87 ("staging: gasket: apex: fixup undefined PCI class") added a quirk to fix the class code, but it was in the apex driver, and if the driver was built as a module, it was too late to help. Move the quirk to the PCI core, where it will always run early enough that the PCI core will assign resources if necessary. Link: https://lore.kernel.org/r/CAEzXK1r0Er039iERnc2KJ4jn7ySNUOG9H=Ha8TD8XroVqiZjgg@mail.gmail.com Fixes: f390d08d8b87 ("staging: gasket: apex: fixup undefined PCI class") Reported-by: Luís Mendes Debugged-by: Luís Mendes Tested-by: Luis Mendes Signed-off-by: Bjorn Helgaas Cc: Todd Poynor Signed-off-by: Greg Kroah-Hartman --- drivers/pci/quirks.c | 7 +++++++ drivers/staging/gasket/apex_driver.c | 7 ------- 2 files changed, 7 insertions(+), 7 deletions(-) --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5293,3 +5293,10 @@ static void pci_fixup_no_d0_pme(struct p dev->pme_support &= ~(PCI_PM_CAP_PME_D0 >> PCI_PM_CAP_PME_SHIFT); } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme); + +static void apex_pci_fixup_class(struct pci_dev *pdev) +{ + pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) | pdev->class; +} +DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, + PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); --- a/drivers/staging/gasket/apex_driver.c +++ b/drivers/staging/gasket/apex_driver.c @@ -578,13 +578,6 @@ static const struct pci_device_id apex_p { PCI_DEVICE(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID) }, { 0 } }; -static void apex_pci_fixup_class(struct pci_dev *pdev) -{ - pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) | pdev->class; -} -DECLARE_PCI_FIXUP_CLASS_HEADER(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID, - PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); - static int apex_pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) {