From patchwork Wed Apr 22 09:57:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "gregkh@linuxfoundation.org" X-Patchwork-Id: 227162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3C30C55189 for ; Wed, 22 Apr 2020 10:42:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C7DFD2073A for ; Wed, 22 Apr 2020 10:42:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587552129; bh=l7ekFKtaYoWG4FL2fqCcuTI64us+m53O/B1Hpmin2sw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=sqyAFLAMzZ4Q0+fMH2AI62reZ9TfNyIERKvHhkKBGu8EEf56f8F7T6FS0ac45JqMh MhPdM/nll01/eO+iWXIdapWdyD7b66BE1qBPgoHtAkm4jKGzDVsOTWcNB1AULpKvwb 37zVGW1l+t9rj4d/5EKndnZELl0TihrawixOsIhg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731685AbgDVKlz (ORCPT ); Wed, 22 Apr 2020 06:41:55 -0400 Received: from mail.kernel.org ([198.145.29.99]:56768 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730071AbgDVKUJ (ORCPT ); Wed, 22 Apr 2020 06:20:09 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8A64B20784; Wed, 22 Apr 2020 10:19:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587550798; bh=l7ekFKtaYoWG4FL2fqCcuTI64us+m53O/B1Hpmin2sw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PMFuOBf1x8NcZm+mhkMv7iLX96cCAaCAZm/X4Edin68PvtXlhLVXp7XWWaAF/KnOL ZYNj57VNLQVLUsXkslC5XidX45iPoFVr0ruNRSbIUJdBsGMDGbCjiayoBYfn2SRtyC 8iQrQMSwsffjYMugVq9Cc8ssCrMOaqbAgBc08p90= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Adrian Huang , Joerg Roedel , Sasha Levin Subject: [PATCH 5.4 098/118] iommu/amd: Fix the configuration of GCR3 table root pointer Date: Wed, 22 Apr 2020 11:57:39 +0200 Message-Id: <20200422095047.349060682@linuxfoundation.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200422095031.522502705@linuxfoundation.org> References: <20200422095031.522502705@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Adrian Huang [ Upstream commit c20f36534666e37858a14e591114d93cc1be0d34 ] The SPA of the GCR3 table root pointer[51:31] masks 20 bits. However, this requires 21 bits (Please see the AMD IOMMU specification). This leads to the potential failure when the bit 51 of SPA of the GCR3 table root pointer is 1'. Signed-off-by: Adrian Huang Fixes: 52815b75682e2 ("iommu/amd: Add support for IOMMUv2 domain mode") Signed-off-by: Joerg Roedel Signed-off-by: Sasha Levin --- drivers/iommu/amd_iommu_types.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h index daeabd98c60e2..0679896b9e2e1 100644 --- a/drivers/iommu/amd_iommu_types.h +++ b/drivers/iommu/amd_iommu_types.h @@ -348,7 +348,7 @@ #define DTE_GCR3_VAL_A(x) (((x) >> 12) & 0x00007ULL) #define DTE_GCR3_VAL_B(x) (((x) >> 15) & 0x0ffffULL) -#define DTE_GCR3_VAL_C(x) (((x) >> 31) & 0xfffffULL) +#define DTE_GCR3_VAL_C(x) (((x) >> 31) & 0x1fffffULL) #define DTE_GCR3_INDEX_A 0 #define DTE_GCR3_INDEX_B 1