From patchwork Tue Mar 3 17:42:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 229891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE078C3F2D7 for ; Tue, 3 Mar 2020 18:11:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 807CA20656 for ; Tue, 3 Mar 2020 18:11:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1583259063; bh=icjx1nfYvX+1hOO+Y5IzkEJ3RQYFaw/dvsLTD1cUB0c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=smEgRz7rV+ZvZrlUpKbsrUD+2LusKbeIOeWATEo41XmovYTLokxnxbngJ42e7Isl7 JlP6QFXnakQZPp2NFq2cKFcO/FOIIpCIu7/0ZFi894PKA61hHE7th3fJ11bGebdoAI Rj3N5g/PgVgxV9I1qlVqfANtaK7d091fw489wwYs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731863AbgCCRuN (ORCPT ); Tue, 3 Mar 2020 12:50:13 -0500 Received: from mail.kernel.org ([198.145.29.99]:57808 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731256AbgCCRuM (ORCPT ); Tue, 3 Mar 2020 12:50:12 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6FD8E21556; Tue, 3 Mar 2020 17:50:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1583257811; bh=icjx1nfYvX+1hOO+Y5IzkEJ3RQYFaw/dvsLTD1cUB0c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=b7yJFcZrIOr0cLA1y/IEuJzLefhYsEe5tXXqOpJQtcXlfUHjVYFcl2H5m6evwkZww qgZnIK491dRamX8cFwaiT91nYHt5vEIj8zVN1iftdzqznVE/lS+cg8TFJaiaLhTNVd 7RwBSC2QS3S2Gj8ZyudMvmxKo3GVFbTozURxv1YY= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Anup Patel , Atish Patra , Palmer Dabbelt Subject: [PATCH 5.5 109/176] RISC-V: Dont enable all interrupts in trap_init() Date: Tue, 3 Mar 2020 18:42:53 +0100 Message-Id: <20200303174317.441494377@linuxfoundation.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200303174304.593872177@linuxfoundation.org> References: <20200303174304.593872177@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Anup Patel commit 6a1ce99dc4bde564e4a072936f9d41f4a439140e upstream. Historically, we have been enabling all interrupts for each HART in trap_init(). Ideally, we should only enable M-mode interrupts for M-mode kernel and S-mode interrupts for S-mode kernel in trap_init(). Currently, we get suprious S-mode interrupts on Kendryte K210 board running M-mode NO-MMU kernel because we are enabling all interrupts in trap_init(). To fix this, we only enable software and external interrupt in trap_init(). In future, trap_init() will only enable software interrupt and PLIC driver will enable external interrupt using CPU notifiers. Fixes: a4c3733d32a7 ("riscv: abstract out CSR names for supervisor vs machine mode") Signed-off-by: Anup Patel Reviewed-by: Atish Patra Tested-by: Palmer Dabbelt [QMEU virt machine with SMP] [Palmer: Move the Fixes up to a newer commit] Reviewed-by: Palmer Dabbelt Signed-off-by: Palmer Dabbelt Signed-off-by: Greg Kroah-Hartman --- arch/riscv/kernel/traps.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -156,6 +156,6 @@ void __init trap_init(void) csr_write(CSR_SCRATCH, 0); /* Set the exception vector address */ csr_write(CSR_TVEC, &handle_exception); - /* Enable all interrupts */ - csr_write(CSR_IE, -1); + /* Enable interrupts */ + csr_write(CSR_IE, IE_SIE | IE_EIE); }