From patchwork Fri Feb 21 07:37:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 230632 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1FE0C35640 for ; Fri, 21 Feb 2020 08:46:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BCF98206DB for ; Fri, 21 Feb 2020 08:46:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582274765; bh=Nst9ebLRaE3NHXB6enkxe0pAhC967ktXa0/Y8kcJryM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=WwA74PCxaVVBgvWi4g3S0qwjdfaMLOp39Cno3ae9wBO/I6sx0pHYQ0A1Y0DAkPRJe 23rkwG9UhF06ri7P4O5cpQ9U23MN83T4ilAtvnUkiZPbkGesf1+gghZefedJsZiWks N3vKkJKE3oIrszUlTpQQ9hjrdk7FB5jsdWnsYFHU= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728777AbgBUHuZ (ORCPT ); Fri, 21 Feb 2020 02:50:25 -0500 Received: from mail.kernel.org ([198.145.29.99]:47286 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729528AbgBUHuX (ORCPT ); Fri, 21 Feb 2020 02:50:23 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9A79A207FD; Fri, 21 Feb 2020 07:50:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582271423; bh=Nst9ebLRaE3NHXB6enkxe0pAhC967ktXa0/Y8kcJryM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KlWo+22aYOpk+499H1KaaX4j+rIACcXZuX6I8wM9GPqna/+ky7dG3YAZec6+onZD2 yBwVb9afqaDZghF9QO+ljHy/jS5I61uNaTzzVYjYtGzVQr3MaMNEsI0tSQsrEofccx /LO5n2Cw1D9aHYckYjVnKzBxOV7muw/IlS4o2qZk= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, James Sewart , Bjorn Helgaas , Logan Gunthorpe , Sasha Levin Subject: [PATCH 5.5 153/399] PCI: Add DMA alias quirk for PLX PEX NTB Date: Fri, 21 Feb 2020 08:37:58 +0100 Message-Id: <20200221072417.363036813@linuxfoundation.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200221072402.315346745@linuxfoundation.org> References: <20200221072402.315346745@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: James Sewart [ Upstream commit 7b90dfc4873b87c468cc6046538f46a531c1d785 ] The PLX PEX NTB forwards DMA transactions using Requester IDs that don't exist as PCI devices. The devfn for a transaction is used as an index into a lookup table storing the origin of a transaction on the other side of the bridge. Alias all possible devfns to the NTB device so that any transaction coming in is governed by the mappings for the NTB. Signed-off-by: James Sewart Signed-off-by: Bjorn Helgaas Reviewed-by: Logan Gunthorpe Signed-off-by: Sasha Levin --- drivers/pci/quirks.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 9aa590eb712fe..83953752337c4 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5371,6 +5371,21 @@ SWITCHTEC_QUIRK(0x8574); /* PFXI 64XG3 */ SWITCHTEC_QUIRK(0x8575); /* PFXI 80XG3 */ SWITCHTEC_QUIRK(0x8576); /* PFXI 96XG3 */ +/* + * The PLX NTB uses devfn proxy IDs to move TLPs between NT endpoints. + * These IDs are used to forward responses to the originator on the other + * side of the NTB. Alias all possible IDs to the NTB to permit access when + * the IOMMU is turned on. + */ +static void quirk_plx_ntb_dma_alias(struct pci_dev *pdev) +{ + pci_info(pdev, "Setting PLX NTB proxy ID aliases\n"); + /* PLX NTB may use all 256 devfns */ + pci_add_dma_alias(pdev, 0, 256); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b0, quirk_plx_ntb_dma_alias); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b1, quirk_plx_ntb_dma_alias); + /* * On Lenovo Thinkpad P50 SKUs with a Nvidia Quadro M1000M, the BIOS does * not always reset the secondary Nvidia GPU between reboots if the system