From patchwork Fri Feb 21 07:42:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 230862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A28EC35640 for ; Fri, 21 Feb 2020 08:24:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D9B8A246A9 for ; Fri, 21 Feb 2020 08:24:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582273482; bh=kpxSpiOredmCdN9Q0Stfhh2Dls3j079H4/egN8JsXU0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=L79MMVpSxFOlurlsg+K67cBPEjjeBRbh41DWqBZM2xqIfPSLBCBHKyg5635UxycD9 /y+H4Cr4y9bhbtiGGjlimGW9z3iFHKUNnRSJZzqIjP86WF/exj6GnQjmn7zfVcuPFS L0aDm8ooUButHf5yOAGntsexFmL0hoQs3t6M1XLI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388671AbgBUIYe (ORCPT ); Fri, 21 Feb 2020 03:24:34 -0500 Received: from mail.kernel.org ([198.145.29.99]:37036 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388667AbgBUIYb (ORCPT ); Fri, 21 Feb 2020 03:24:31 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CA186246A1; Fri, 21 Feb 2020 08:24:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582273471; bh=kpxSpiOredmCdN9Q0Stfhh2Dls3j079H4/egN8JsXU0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XEHMZkXqWIH1Y4dMpFwx8yWHEPRfsE3/a8lrm0pePfSyIrXrpz1PAQjEuRfimOQ32 1ReK0tXmQ6hqm3CNc7KR8UcLlb/BT44NQprmnwBD07znrO3fBjRLXNcjC7z1KlzL3P IykrYTM6bAakIDAqiL0Tegc2JkubokSHjR0Ds0QQ= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Evan Quan , Alex Deucher , Sasha Levin Subject: [PATCH 4.19 184/191] drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency Date: Fri, 21 Feb 2020 08:42:37 +0100 Message-Id: <20200221072312.821201678@linuxfoundation.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200221072250.732482588@linuxfoundation.org> References: <20200221072250.732482588@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Alex Deucher [ Upstream commit 4d0a72b66065dd7e274bad6aa450196d42fd8f84 ] Only send non-0 clocks to DC for validation. This mirrors what the windows driver does. Bug: https://gitlab.freedesktop.org/drm/amd/issues/963 Reviewed-by: Evan Quan Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c index 1546bc49004f8..3fa6e8123b8eb 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c @@ -994,12 +994,15 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, clocks->num_levels = 0; for (i = 0; i < pclk_vol_table->count; i++) { - clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10; - clocks->data[i].latency_in_us = latency_required ? - smu10_get_mem_latency(hwmgr, - pclk_vol_table->entries[i].clk) : - 0; - clocks->num_levels++; + if (pclk_vol_table->entries[i].clk) { + clocks->data[clocks->num_levels].clocks_in_khz = + pclk_vol_table->entries[i].clk * 10; + clocks->data[clocks->num_levels].latency_in_us = latency_required ? + smu10_get_mem_latency(hwmgr, + pclk_vol_table->entries[i].clk) : + 0; + clocks->num_levels++; + } } return 0;